Centellax, Inc.

Hewlett-packard Company

Jeffrey W Meyer

Jerry Orr

David E Root

Siqi Fan

Sean Pham

A traveling wave amplifier includes a tapered attenuator network for mitigating the effects of DC bias inductor self-resonance. The amplifier includes a gain stages connected in a ladder network for successively amplifying a forward traveling wave caused by an input signal to produce an output signal. A back termination is coupled to the gain stages to absorb backwards traveling waves created by reflections from the gain stages and an output of the amplifier. An inductive DC bias circuit is coupled to the gain stages near the back termination for providing DC bias to the gain stages. A tapered multi-section frequency selective attenuator network is connected between the DC bias circuit and a first one of the gain stages for reducing the effect of self-resonance of the inductive DC bias circuit on the output signal.

Tapered attenuator network for mitigating effects of direct current (DC) bias inductor self-resonance in traveling wave amplifiers

A termination network simultaneously provides a voltage-limited output direct current (dc) bias and termination of a broadband distributed amplifier operating down to an arbitrary low frequency. It is capable of being fabricated in a single Integrated Circuit (IC) chip, without the excess power dissipation associated with biasing through a termination resistor, and without the use of external inductor networks. It also limits the maximum dynamic voltage swing on the outputs of the active gain devices used within the distributed amplifier, so as to increase the reliability of the distributed amplifier under large signal over drive conditions.

Voltage-limited distributed current source for ultra-broadband impedance termination

A modeling system for active semiconductor devices, such as gallium arsenide field effect transistors, for nonlinear (e.g., harmonic balance) circuit simulation. The model enables fast and unambiguous construction (model generation) by explicit calculations applied to raw device response data obtained using an adaptive, automated data acquisition system employed to characterize the device. The automated data acquisition system obtains the data adaptively, taking more data where nonlinearities are most severe and within a calculated, safe operating range of the device. The system converts conventional d.c. and S-parameter data directly into a detailed, device-specific, large-signal model. The system is extremely fast and replaces the need for conventional parameter extraction based on circuit simulation and optimization techniques. The measurement-based model improves large-signal simulation accuracy over an extended operating frequency range, because the model nonlinearities are explicitly constructed from device response data. The model is non quasi-static in that it accounts for frequency dispersion effects. Scaling rules allow devices of various geometries to be simulated from measurements on a single device. Therefore, the model is general, being technology and process independent in that the same calculation procedure applies to any device for which the equivalent circuit is valid. The model implementation in the automated data acquisition system, model generator, and harmonic balance (nonlinear) circuit simulator provides an efficient, practical system for state-of-the-art nonlinear circuit design.

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Santa Rosa, CA, United States of America

Jeffrey W Meyer