International Business Machines Corporation

Jeffrey Thomas Coffin

Hilton T Toy

Michael A Gaynes

Frank Louis Pompeo

Lewis Sigmund Goldmann

Michael J Ellsworth, Jr

Kamal Kumar Sikka

David L Questad

Sushumna Iruvanti

Raed A Sherif

William Edward Sablinski

Jamil A Wakil

Stephen S Drofitz, Jr

David L Edwards

Jeffrey Allen Zitz

Mario John Interrante

Peter Jeffrey Brofman

Anson Jay Call

Kathleen Ann Stalter

Mark G Courtney

Armando S Cammarano

John G Torok

Steven Paul Ostrander

David James Alcoe

Randall Joseph Stutzman

Harvey Charles Hamel

Brenda Lee Peterson

Constance J Araps

Renee L Weisman

Jiali Wu

Luu T Nguyen

Allen J Arnold

Megan J Shannon

Alain A Caron

Shirley Cheng

Kevin G Bivona

Christopher Todd Spring

The present invention provides chip containing electronic devices such as Multichip Ceramic Modules (MCM's) containing a plurality of chips on a substrate which chips are underfilled with a reworkable composition which allows one or more chips to be removed from the device and replaced. The reworkable compositions contain a base resin which is not cross-linkable and which forms a matrix with a linear curable component or preferably a combination of linear curable components which curable components are cross-linkable and when cured form a cross-linked domain in the base resin matrix. A suitable cross-linking catalyst such as Pt is used and optionally a filler preferably silane surface treated silica. The preferred base resin is linear polydimethylsiloxane and the preferred curable components are vinyl terminated linear poly dimethyl siloxane and hydrogen terminated linear poly dimethyl siloxane.

Reworkable underfills for ceramic MCM C4 protection

Disclosed are thermally conductive plates. Each plate is configured such that a uniform adhesive-filled gap may be achieved between the plate and a heat generating structure when the plate is bonded to the heat generating structure and subjected to a temperature within a predetermined temperature range that causes the heat generating structure to warp. Additionally, this disclosure presents the associated methods of forming the plates and of bonding the plates to a heat generating structure. In one embodiment the plate is curved and modeled to match the curved surface of a heat generating structure within the predetermined temperature range. In another embodiment the plate is a multi-layer conductive structure that is configured to undergo the same warpage under a thermal load as the heat generating structure. Thus, when the plate is bonded with the heat generating structure it is able to achieve and maintain a uniform adhesive-filled gap at any temperature.

Method of forming a flip-chip package

Optimized thermally conductive plate and attachment method for enhanced thermal performance and reliability of flip chip organic packages

Electronic packages incorporating EMI shielding, and particularly semiconductor devices which incorporate semiconductor chip-carrier structures having grounded bands embedded therein which are adapted to reduce outgoing and incident EMI emissions for high-speed switching electronic packages.

EMI shielding for semiconductor chip carriers

A module or assembly is formed by interposing a polymer between a carrier and a semiconductor device to be secured to the carrier. The polymer has ionized metallic particles suspended in it. Before setting or curing the polymer, the module is exposed to an electric field which induces migration of the metallic particles to the opposing pads of the carrier and semiconductor device. Such migration ultimately forms metal dendrites extending between mating pad pairs. The dendrites establish a metallurgical bond and conductive paths between the carrier and the overlying semiconductor device. When the polymer is subsequently set, the carrier and device are not only adhered to each other, but the dendrite connections are fixed and structurally reinforced to provide the needed electrically conductive paths.

Method for assembling a carrier and a semiconductor device

A capping structure and capping method are presented for an electronics package having a substrate and one or more electronics devices disposed on the substrate. The capping structure includes a capping plate sized to cover the electronics device(s) disposed on the substrate, and two or more force transfer pins. The force transfer pins are disposed between the capping plate and the substrate so that when a force is applied to the capping plate or the substrate, the force is transferred therebetween via the force transfer pins. Various capping plate and pin configurations are presented.

Capping structure for electronics package undergoing compressive socket actuation

A semiconductor chip module uses a silicone adhesive between the semiconductor chip and a cap, said adhesive having sufficient bond strength to secure said cap to said chip without additional mechanical constraint while providing a direct thermally conductive path and permitting sufficient heat flow from said chip to said cap to maintain steady state operation of said semiconductor chip. The preferred silicone adhesive comprises a primerless, two-part polysiloxane-based adhesive made by reacting polydimethyl siloxane, an organosilicon compound, a polysiloxane, and a silane, in the presence of a catalyst.

Method for direct attachment of a chip to a cooling member

Module with metal-ion matrix induced dendrites for interconnection

A device and method for hermetically sealing an integrated circuit chip between a substrate and a lid while providing effective dissipation of heat generated by the integrated circuit chip. The device includes an integrated circuit chip, carrier substrate, interface coolant, and a lid. The integrated circuit chip is attached to the top of the carrier substrate. The interface coolant is disposed on the top of the integrated circuit chip and the lid is placed on top of the carrier substrate/integrated circuit chip combination and contacts the interface coolant. The interface coolant provides a thermal path for conducting heat from the integrated circuit chip to the lid. The substrate is attached to a circuit board by a ceramic ball grid array (CBGA) or a ceramic column grid array (CCGA).

Hermetic CBGA/CCGA structure with thermal paste cooling

The present invention relates generally to a new scheme of providing a seal band for semi-conductor substrates and chip carriers. More particularly, the invention encompasses a structure and a method that uses a multi-layer metallic seal to provide protection to chips on a chip carrier. This multi-layer metal seal provides both enhanced hermeticity lifetime and environmental protection. For the preferred embodiment the multi-layer metallic seal band is a three layer, solder sandwich structure which is used to create a low cost, high reliability, hermetic seal for the module. This solder sandwich has a high melting temperature thick solder inner core, and lower melting point thin interconnecting solder layers, where the thin interconnecting solder layers may have similar or different melting points.

Multi-layer solder seal band for semiconductor substrates

Multi-layer solder seal band for semiconductor substrates and process

Disclosed is a method of inhibiting corrosion on an electronic component. The method includes the steps of obtaining an electronic component and then cleaning the electronic component in a solution consisting of a complexing agent and a solvent in which the complexing agent is soluble. The complexing agent is a crown compound.

Method of inhibiting corrosion in an electronic package

Growing community of inventors

Pleasant Valley, NY, United States of America

Jeffrey Thomas Coffin