Xilinx, Inc.

Disney Enterprises, Inc.

Jeffrey Stroomer

Roger Brent Milne

Jonathan B Ballagh

Nabeel Shirazi

L James Hwang

Sean Kelly

Haibing Ma

Philip Bryn James-Roxby

Raul E Rangel

Chi Bun Chan

Jingzhao Ou

Alexander R Vogenthaler

Isaac W Foraker

Christopher H Dick

Kumar Deepak

Eric R Keller

Bradley L Taylor

Thomas E Fischaber

Shay Ping Seng

Gabor Szedo

Krista M Marks

Jeffrey C Ward

Jimmy Zhenming Wang

Singh Vinay Jitendra

Alexander Carreira

R Brent Milne

Sreekanth Juttu

System, method, and computer program product to perform an operation, including installing a first service on a first virtual machine and a second service on a second virtual machine in a web services cluster, testing the first service on the first virtual machine and the second service on the second virtual machine to determine that the first and second services are stable, installing the first service and the second service on a third virtual machine in the web services cluster, causing at least a portion of traffic directed to the first service and the second service to be sent to the third virtual machine, testing the first service and the second service on the third virtual machine, and removing the first and second virtual machines from the web services cluster upon determining that the first service and the second service executing on the third virtual machine are stable.

Safe low cost web services software deployments

There are provided systems and methods for providing low-risk deployment of a web service. In one implementation, such a method includes testing the web service on one or more virtual machines assigned to a testing environment of the system, and reassigning the one or more virtual machines to a production environment of the system configured to service live traffic for the web service. The method also includes hosting the web service using the same one or more virtual machines used to test the web service.

Low-risk deployment of web services

Method, system, and computer program product to manage traffic in a web services cluster using a programmable reverse proxy, by providing the reverse proxy in the cluster, the cluster hosting web services, defining, in a routing table in the reverse proxy, stacks and a weight for each stack, each stack including at least one version of a web service, receiving, at the reverse proxy, a URL requesting to access a web service, selecting one of a first stack and a second stack based on the weights of each stack, the first stack specifying a first version of the web service, the second stack specifying a second version of the web service, each of the first stack and the second stack selected at least once in a plurality of requests, and generating, at the reverse proxy, a URL directed to the version of the web service specified by the selected stack.

Managing web services using a reverse proxy

Techniques for creating a mosaic using user-created content on a content sharing site. Embodiments of the invention may provide an interface on the content sharing site to allow users to create content. Embodiments may then determine a suitability value between the user-created content and portions of a mosaic, and insert the user-created content into a particular portion of the mosaic based on the determined suitability value for the particular portion.

Mosaic generation from user-created content

Circuits, systems, and methods for processing outlier pixels include a spatial filter and a temporal filter. The spatial filter is configured to compute a pixel difference for each pixel as a function of a pixel value of the pixel and pixel values of nearby pixels within each frame. The spatial filter is configured to dynamically add the pixel to a candidate list when the pixel difference exceeds a threshold value. The temporal filter dynamically removes a pixel from the candidate list when there is a divergence of a pixel value of the pixel in successive frames. The temporal filter determines a pixel in the candidate list is an outlier pixel when there is no such divergence in the successive frames.

Determining outlier pixels of successive frames

An embodiment of a method for enabling a high level modeling system for implementing a circuit design in an integrated circuit device includes: receiving a high-level characterization of the circuit design; receiving a portable location constraint associated with elements of the circuit design; and generating, by a computer, a low-level characterization of the circuit design based upon the high-level characterization and the portable location constraint.

Enabling a high-level modeling system

A method of testing software can include maintaining a cache within at least one of a plurality of farm machines of a testing farm. Each cache can include at least one version of test ingredients. The method can also include receiving, within at least one selected farm machine, a request to perform a test involving a test version of the test ingredients and comparing the test version of the test ingredients with versions of the test ingredients stored within the cache of the selected farm machine. The method can also include selectively updating a version of the test ingredients stored within the cache of the selected farm machine according to the comparison.

Using a software repository to increase the speed of software testing

A computer-implemented method of circuit design can include receiving clock frequency constraints defining relationships between clock frequencies of a plurality of clock domains of a circuit design specified within a high-level modeling system () and receiving a cost function that is dependent upon the clock frequencies of the plurality of clock domains (). A feasibility result can be determined according to the clock frequency constraints and the cost function (). The feasibility result can indicate whether a clock frequency assignment exists that specifies a clock frequency for each of the plurality of clock domains that does not violate any clock frequency constraint. The feasibility result can be output ().

Clock frequency exploration for circuit designs having multiple clock domains

A method of modeling a design in a high level modeling system that supports unidirectional data flow, may comprise identifying a bus-block to represent a connectivity of a bi-directional bus in an system. The bus-block may be represented in serial relationship with the bus. Taps may interface the bus via the bus-block. During simulation, the bus-block emulates behavior of a tri-state buffer in series with an input line for the tap interface. During synthesis, pairs of unidirectional input and output lines of opposite data-routing orientation, which may emulate bus ports to the bus-block, may be collapsed to a single bus port. The synthesis may further generate a netlist that may dispose a tri-state buffer between a tap input and the bus. The netlist may also represent layout of the tri-state buffer for driving an output of the tap.

Method of simulating bidirectional signals in a modeling system

Method and apparatus for translating a first program in a dynamically-typed language to a program in a hardware description language. From the dynamically-typed-language first program, a second program in single static assignment format is generated. For cases where a variable is assigned different data types at different places in the program, the assignments of the different data types are resolved for the variable. The second program is then translated to a program in the hardware description language.

Translation of a program in a dynamically-typed language to a program in a hardware description language

A method of communicating data among a plurality of software modules of a heterogeneous software system can include constructing an XTable object in a first software module of the plurality of software modules and providing the XTable object to a second software module of the plurality of software modules. The method further can include extracting data from the XTable object within the second software module.

Using XTables to communicate in a high level modeling system

A method of passing data among modules of a heterogeneous software system can include identifying a scripted function to be executed within the heterogeneous software system and building a wrapper script by embedding a call to the scripted function and an XTable object associated with the scripted function within the wrapper script. The method further can include executing the wrapper script thereby causing the scripted function to execute and receiving a result from execution of the scripted function.

Using scripts for netlisting in a high-level modeling system

Determining data rates and data types in a an electronic design. In one embodiment, an electronic design is created in a memory arrangement in response to user input. The electronic design includes a plurality of functional blocks and a plurality of nets connecting the functional blocks. In response to user input, an output data rate and an output data type of data output from at least one of the functional blocks are determined. The input data rate and input data type to each functional block coupled via a net to the at least one functional block are equal to the output data rate and output data type, respectively, from the at least one functional block. For each functional block, an output data rate and output data type are determined as a function of the input data rate and the input data type of the functional block.

Determination of data rate and data type in a high-level electronic design

Translation of high-level design blocks into a design specification in a hardware description language (HDL). Each block in the high-level design is assigned to a group. A set of attributes is identical between the blocks in a group. For each group of blocks, a respective set of parameters having different values on subblocks of at least two blocks in the group is determined. An HDL specification is generated for each group. The HDL specification for a group has for each parameter in the set of parameters, a parameter input.

Translation of high-level circuit design blocks into hardware description language

A method is provided that speeds up software testing using abbreviation of software tests that skips the execution of a portion of the software test. Intermediate results are generated for one or more software tests, with each intermediate result corresponding to a software test, and a respective key is generated from each intermediate result. A determination is made whether the respective key for each intermediate result is stored in a file cache used for storing files under keys. Generation of a final result for the corresponding software test of each intermediate result is bypassed in response to the respective key being present in the file cache. A final result for the corresponding software test of each intermediate result is generated from the intermediate result in response to the respective key not being present in the file cache. The respective key is stored in the file cache in response to generation of each final result.

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Lafayette, CO, United States of America

Jeffrey Stroomer