Adeia Semiconductor Bonding Technologies Inc.

Vertical Circuits, Inc.

Jeffrey S Leal

Grant Villavicencio

Suzette Keefe Pangrle

Reynaldo Co

Scott P McGrath

Simon J S McElrea

Keith L Barrie

Lawrence Douglas Andrews, Jr

Elmer M Del Rosario

John R Bray

DeAnn Eileen Melcher

Loreto Cantillep

Simon McElrea

De Ann Eileen Melcher

Ravi Shenoy

Suzette K Pangrie

Methods for forming connectors on die pads at a wafer level of processing include forming spots of a curable electrically conductive material over die pads and extending to or over the interconnect die edge; curing the conductive material; and in a wafer cutting procedure thereafter severing the spots. Also, die pad to z-interconnect connectors formed by the methods, and shaped and dimensioned accordingly. Also, stacked die assemblies and stacked die packages containing die prepared according to the methods and having die pad to z-interconnect connectors formed by the methods and shaped and dimensioned accordingly.

Electrical connector between die pad and z-interconnect for stacked die assemblies

Additive processes are employed for electrically insulating selected surface regions on a stack of die; and methods for electrically interconnecting die in a stack of die, include additive processes for electrically insulating selected surface regions of the die. Regions that are not insulated according to the invention are available for electrical connection using electrically conductive material applied in flowable form to make electrically conductive traces.

Selective die electrical insulation by additive process

An EMI shield can be formed directly on a component, e.g., an unpackaged or packaged semiconductor die, by depositing and curing a curable composition which includes electrically conductive particles and a carrier. In examples, the shield can be configured as a grid or net of electrically conductive traces or lines. The curable electrically conductive material may be applied to the component surface in a flowable form and cured or allowed to cure to form the electrically conductive shield. The shield can be electrically coupled to contacts on an underlying circuit panel or support. The coupling material may be a conductive adhesive, and may be or may include a material the same as, or similar to, the shield material.

EMI shield

Methods are disclosed for improving electrical interconnection in stacked die assemblies, and stacked die assemblies are disclosed having structural features formed by the methods. The resulting stacked die assemblies are characterized by having reduced electrical interconnect failure.

Stacked die assembly having reduced stress electrical interconnects

A die has interconnect pads on an interconnect side near an interconnect edge and has at least a portion of the interconnect side covered by a conformal dielectric coating, in which an interconnect trace over the dielectric coating forms a high interface angle with the surface of the dielectric coating. Because the traces have a high interface angle, a tendency for the interconnect materials to 'bleed' laterally is mitigated and contact or overlap of adjacent traces is avoided. The interconnect trace includes a curable electrically conductive interconnect material; that is, it includes a material that can be applied in a flowable form, and thereafter cured or allowed to cure to form the conductive traces. Also, a method includes, prior to forming the traces, subjecting the surface of the conformal dielectric coating with a CFplasma treatment.

Semiconductor die having fine pitch electrical interconnects

A die (or of a stack of die) is mounted over and elevated above a support, and is electrically connected to circuitry in the support. Pillars of electrically conductive material are formed on a set of bond pads at a mount side of the support, and the elevated die (or at least one die in the elevated stack of die) is electrically connected to the support, by traces of an electrically conductive material contacting interconnect pads on the die to the pillars, and through the pillars to the support. Also, tiered offset stacked die assemblies in a zig-zag configuration, in which the interconnect edges of a first (lower) tier face in a first direction, and the interconnect edges of a second (upper) tier, stacked over the first tier, face in a second direction, different from the first direction, are electrically connected to a support. Die in the first tier are electrically interconnected die-to-die, and the tier is electrically connected to a support, by traces of an electrically conductive material contacting interconnect pads on the die and a first set of bond pads on the support. Pillars of a electrically conductive material are formed on a second set of bond pads, and die in the second tier are electrically interconnected die-to-die, and the tier is electrically connected to the support, by traces of an electrically conductive material contacting interconnect pads on the die to the pillars, and through the pillars to the substrate.

Electrical interconnect for die stacked in zig-zag configuration

A flat leadless package includes at least one die mounted onto a leadframe and electrically connected to leads using an electrically conductive polymer or an electrically conductive ink. Also, an assembly includes stacked leadless packages electrically connected to leads using an electrically conductive polymer or an electrically conductive ink. Also, a package module includes an assembly of stacked leadless packages mounted on a support and electrically connected to circuitry in the support using an electrically conductive polymer or an electrically conductive ink.

Growing community of inventors

Scotts Valley, CA, United States of America

Jeffrey S Leal