Motorola Corporation

Jeffrey P Gleason

Howard E Levin

Peter R Molnar

Terence L Johnson

Michael R May

Mathew A Rybicki

Matthew A Pendleton

Carlos A Greaves

Sujit Sudhaman

Jody H Everett

John M Porter

Robin Wiprud

Jean-Louis Dolmeta

A method and apparatus for performing DMT frame synchronization in an ADSL system begins by providing a training signal (82) to a receiver of the ADSL system (34). The training signal (82) is processed to result in a desired impulse response. The impulse response is used to reduce inter-symbol interference between time-adjacent DMT frames (100-108). The desired impulse response is used to calculate a frame misalignment value (.DELTA.T). The frame misalignment value (.DELTA.T) of the desired impulse response (84) is then utilized to adjust an internal counter of the receiver to perform frame alignment. The use of the training signal (82) and impulse response (84) to provide for both intersymbol interference reduction (FIG. 5) and frame synchronization (FIG. 8) provides for fast ADSL initialization.

Method and apparatus for performing frame synchronization in an

A communications system 10 having an Asymmetric Digital Subscriber Line (ADSL) transceiver (24) is provided which may be configured either as a central office or a remote terminal in a system. The transceiver (24) operates in a listen/report idle state to report line activity to a host processor (22) prior to being configured as a central office or remote terminal. The host processor configures the transceiver (24) as a central office, remote terminal, or as otherwise specified based on the line activity.

Apparatus and method for auto-configuring a communication system

A transceiver (5) for an asymmetric communication system such as asymmetric digital subscriber line (ADSL) includes a configuration register (71) defining operation at either a central office (CO) or a remote terminal (RT). The configuration register (71) includes a control bit (72) for selecting either CO or RT mode. The transceiver (5) includes a signal processing module (70) configured according to the state of the control bit (72). For example, a digital interface (70) converts transmit data into transmit symbols and converts received symbols into receive data. The digital interface (70) uses a large memory (158) as a buffer in the transmit path and a small memory (160) as a buffer in the receive path in CO mode. In RT mode, the digital interface (70) uses the small memory (160) in the transmit path and the large memory (158) in the receive path. The selective configuration allows a single integrated circuit to be used in both CO and RT equipment.

Single-chip software configurable transceiver for asymmetric

A host processor (22) in a communication system (10) identifies a level of program visibility for reporting predetermined activation state changes, and signals a communications transceiver (24) to begin an initialization process. The communications transceiver (24) begins executing a series of states (51-55, 61-64) for initializing the communication system (10). A determination is made by the transceiver (24) whether a state change has occurred. A state change is identified and reported to a host processor (22) based on the program visibility select level.

Transceiver and method for reporting state transitions in a

A communications system (30) includes a transceiver (42) for transmitting data from a plurality of bins. Specifically, the BER of the bins is substantially equalized by allocating data by determining a projected margin. The projected margin is calculated for each bin by subtracting a reference signal-to-noise value from an estimated bin signal-to-noise value. The reference signal-to-noise value is predetermined by theoretical calculation or empirical data and stored in a look-up table. Bits are allocated to the bin having the maximum projected margin. This provides the best BER without changing the transmit power.

Growing community of inventors

Austin, TX, United States of America

Jeffrey P Gleason