Intersil Americas Inc.

Intersil Corporation

Jeffrey Michael Johnston

Dev Alok Girdhar

Michael D Church

Kantilal Bacrania

Akira Ito

Choong-Sun Rhee

Glenn Alan DeJong

Body contact layouts for semiconductor structures are disclosed. In at least one exemplary embodiment, a semiconductor structure comprises: a plurality of gates disposed on a semiconductor layer, each gate extending parallel to a y-axis in a coordinate space; a source region disposed between two of the plurality of gates; a plurality of body contacts disposed in each source region; and wherein a portion of each source region, adjacent to the gate, has a width extending parallel to the y-axis that is greater than the width of the source region parallel to the y-axis at a distance on an x-axis from the gate.

Body contact layouts for semiconductor structures

Methods for forming body contact layouts for semiconductor structures are disclosed. In at least one exemplary embodiment, a method comprises: forming a plurality of gates disposed on a semiconductor layer, each gate extending parallel to a y-axis in a coordinate space; a source region disposed between two of the plurality of gates; a plurality of body contacts disposed in each source region; and wherein a portion of each body contact, adjacent to the gate, has a width extending parallel to the y-axis that is less than the width of the body contact parallel to the y-axis at a distance on an x-axis from the gate.

Method of forming body contact layouts for semiconductor structures

An integrated circuit has an isolation structure in the form of a double diode moat. The P substrate has P&plus; buried layers,and,on opposite sides of N&plus; buried layer,. Analog devices are formed behind one diode moat, digital CMOS devices are formed behind the other moat.

Analog-to-digital converter and method of fabrication

An integrated circuit has a pseudosubstrate 6060 with an isolation moat 9505. Substrate 6001 has one conductivity and a subcircuit region 6060 has an opposite conductivity. Digital CMOS devices are formed in the subcircuit over region 6060 and operate between zero to +5 volts. Analog devices are formed over the rest of the substrate and operate between plus and minus 5 volts. The moat 9505 isolates the digital CMOS devices from the analog devices.

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Indian Harbour Beach, FL, United States of America

Jeffrey Michael Johnston