International Business Machines Corporation

Jeffrey M Turner

Howard M Haynie

Michael J Cadigan, Jr

Nihad Hadzic

Carl Alfred Bender

Jeffrey C Hanscom

Raymond Wong

Bruce H Ratcliff

Tin-Chee Lo

John R Flanagan

Daniel Francis Casper

George Kuch

Raymond Michael Higgs

Jie Zheng

Clinton E Bubb

Thomas D Needham

Donald Jung

Stephen R Valley

Kathy Sue Barkey

Yuk-Ming Ng

Bryan K Tanoue

Sandeep Brahmadathan

Donald W Schmidt

Thomas Anthony Gregg

David F Craddock

Jerry Wayne Stevens

Bruce Marshall Walk

Steven G Glassen

Richard K Errickson

Patrick Gerald Brown

Thomas Donald Moore

Anil Shrikant Keste

Joel Goldman

Daniele Di Genova

Krishna M Desai

Michael J Cardigan, Jr

A method for updating a descriptor engine for a network interface card (NIT) can include quiescing, by a processing device, a transmit stream to the NIC. The method can further include stopping, by the processing device, a descriptor engine from providing new receive descriptors to the NIC. The method can further include setting, by the processing device, a controller to redirect inbound traffic to the memory. The method can further include restoring, by the processing device, a transmit configuration and a transmit state of the descriptor engine subsequent to updating the descriptor engine.

Upgrading a descriptor engine for a network interface card

A method for updating a descriptor engine for a network interface card (NIC) may include quiescing a transmit stream to the NIC. The method may further include stopping a descriptor engine from providing new receive descriptors to the NIC. The method may further include creating a copy in a memory of any receive descriptors already available to the NIC prior to the stopping the descriptor engine. The method may further include setting a controller to redirect inbound traffic to the memory. The method may further include restoring a transmit configuration and a transmit state of the descriptor engine subsequent to updating the descriptor engine.

A method for facilitation of aggregation of contiguous data packets, such as contiguous I/O adapter stores, is disclosed. Commensurate with receiving data packets to be written to a memory, multiple contiguous data units of the data packets are aggregated into an aggregated data block. The aggregated data block is validated for writing to memory responsive to either the aggregated data block reaching a size which with inclusion of a next contiguous data unit in the aggregated data block would result in the aggregated data block exceeding a configurable size limit, or a next data unit of the plurality of data units to be written to memory being non-contiguous with the multiple contiguous data units.

Facilitating routing by selectively aggregating contiguous data units

Examples of techniques for upgrading a descriptor engine for a network interface card (NIC) are disclosed. An example method may include: quiescing a transmit stream to the NIC; stopping a descriptor engine from providing new receive descriptors to the NIC; creating a copy in a memory of any receive descriptors already available to the NIC prior to the stopping the descriptor engine; setting a controller to redirect inbound traffic to the memory; logging a current configuration, state, and receive pointers of the descriptor engine; updating the descriptor engine; restoring a transmit configuration and a transmit state of the descriptor engine; and enabling a transmit stream of a data router such that transmit packets are created by the descriptor engine for transmission by the NIC.

Processing of out-of-order data transfers is facilitated in computing environments that enable data to be directly transferred between a host bus adapter (or other adapter) and a system without first staging the data in hardware disposed between the host bus adapter and the system. An address to be used in the data transfer is determined, in real-time, by efficiently locating an entry in an address data structure that includes the address to be used in the data transfer.

Facilitating processing of out-of-order data transfers

A calculation, prediction and validation method can include receiving a portion of a data packet in a data buffer, computing, in a processor, information related to the checksum of the data packet based on the portion of the data packet and processing the data packet in the processor.

Checksum calculation, prediction and validation

Aggregation of contiguous data packets, such as contiguous I/O adapter stores, is disclosed. Commensurate with receiving data packets to be written to a memory, multiple contiguous data units of the data packets are aggregated into an aggregated data block. The aggregated data block is validated for writing to memory responsive to either the aggregated data block reaching a size which with inclusion of a next contiguous data unit in the aggregated data block would result in the aggregated data block exceeding a configurable size limit, or a next data unit of the plurality of data units to be written to memory being non-contiguous with the multiple contiguous data units.

A computer-implemented method that includes creating a master copy of a header for all packets of a data transmission event, the master copy including a plurality of intact constant header information, the plurality of intact constant header information being constant for all packets of the data transmission event, storing unique header information for all packets of the data transmission event, the unique header information including information unique to at least one packet of the data transmission event, tokenizing identities of each packet of the data transmission event to create a tokenized packet ID for each packet, and indexing the stored unique header information based on the tokenizing. According to the method, at packet read-time, unique header information associated with the packet is overlayed onto the master copy to create a unique packet.

Memory saving packet modification

Programmable hardware devices are re-programmed without system downtime. To re-program the device, the device is quiesced, state associated with the device is saved, updates are loaded, the state is restored and operations are resumed, all transparent to the system, except for a possible delay in the system.

Re-programming programmable hardware devices without system downtime

The method includes creating a master copy of a header for all packets of a data transmission event, the master copy including a plurality of intact constant header information, the plurality of intact constant header information being constant for all packets of the data transmission event, storing unique header information for all packets of the data transmission event, the unique header information including information unique to at least one packet of the data transmission event, tokenizing identities of each packet of the data transmission event to create a tokenized packet ID for each packet, and indexing the stored unique header information based on the tokenizing. A computer program product for directing a computer processor to perform a method. According to the method, at packet read-time, unique header information associated with the packet is overlayed onto the master copy to create a unique packet.

A checksum calculation, prediction and validation system includes a host system, a network interface, a reception pipeline disposed between the host system and network interface and configured to calculate an expected full checksum related to packets received in the host system and a transmission pipeline disposed between the host system and network interface and configured calculate factors related to packets for transmission on the network interface.

Growing community of inventors

Poughkeepsie, NY, United States of America

Jeffrey M Turner