Apple Inc.

Other

Jeffrey M Thoma

Shawn Xavier Arnold

Scott P Mullins

Dennis R Pyper

Sean Anthony Mayo

Connor Raymond Duke

Douglas P Kidd

Kenyu Tojima

Henry Hung Yang

Michael Eng

Qishan Yu

Yanchu Xu

Robert S Sorensen

Kieran Poulain

Gang Ning

James W Bilanski

Mingzhe Li

Sung Woo Yoo

Amanda R Rainer

Ramamurthy Chandhrasekhar

Nelson J Kottke

Miguel Alejandro Lara-Pena

Weng Choy Foo

The described embodiments relate generally to printed circuit boards (PCBs) including a capacitor and more specifically to designs for mechanically isolating the capacitor from the PCB to reduce an acoustic noise produced when the capacitor imparts a piezoelectric force on the PCB. Conductive features can be mechanically and electrically coupled to electrodes located on two ends of the capacitor. The conductive features can be placed in corners where the amplitude of vibrations created by the piezoelectric forces is relatively small. The conductive features can then be soldered to a land pattern on the PCB to form a mechanical and electrical connection while reducing an amount of vibrational energy transferred from the capacitor to the PCB.

Acoustically quiet capacitors

An electronic device may be provided with integrated circuits and electrical components such as capacitors that are soldered to printed circuit boards. Liquid polymer adhesive such as encapsulant and underfill materials may be deposited on the printed circuit. Electrical components such as capacitors may be coated with the encapsulant. The underfill may be deposited adjacent to an integrated circuit, so that the underfill wicks into a gap between the integrated circuit and the printed circuit board. The encapsulant may be more viscous than the underfill and may therefore prevent the flowing underfill from reaching the electrical components. Some of the encapsulant may be located between the electrical components and the printed circuit board. The encapsulant can be cured to form an elastomeric material covering the electrical components that helps damp vibrations. The elastomeric material may be less stiff than the underfill.

Electronic device with printed circuit board noise reduction using elastomeric damming and damping structures

The described embodiments relate generally to a capacitor assembly for mounting on a printed circuit board (PCB) and more specifically to designs for mechanically isolating the capacitor assembly from the PCB to reduce an acoustic noise produced when the capacitor imparts a piezoelectric force on the PCB. Termination elements in the capacitor assembly, including a porous conductive layer in the capacitor assembly may reduce an amount of vibrational energy transferred from the capacitor to the PCB. Termination elements including a soft contact layer may also reduce the amount of vibrational energy transferred to the PCB. Further, capacitor assemblies having thickened dielectric material may reduce the amount of vibrational energy transferred to the PCB.

Low acoustic noise capacitors

The described embodiments relate generally to electronic components and more specifically to a capacitor array that can increase component density on a printed circuit board and reduce a distance to a ground plane. An array of capacitors can be formed by coupling a group of capacitors on their sides interspersed with interposer boards. The resulting configuration can increase component density and reduce an amount of resistance and effective series inductance between a set of power decoupling capacitors and an integrated circuit.

Small form factor stacked electrical passive devices that reduce the distance to the ground plane

An electronic device may be provided with antenna structures. Circuitry such as radio-frequency transceiver circuitry and impedance matching and filter circuitry may be implemented using one or more circuit components and embedded within an insulator to form packaged circuitry. The insulator may be formed from multiple layers of printed circuit board material or from plastic molded onto a printed circuit board substrate over the circuitry. A metal shield layer may be interposed between the packaged circuitry and the antenna structures. The metal shield layer may be mounted on the surface of the packaged circuitry using a layer of adhesive. A layer of polymer may be interposed between the layer of adhesive and the metal shielding layer. The metal shield layer may have an opening through which conductive paths may pass to couple the packaged circuitry to antenna terminals on the antenna structures.

Antenna structures and shield layers on packaged wireless circuits

A device under test (DUT) may be tested using a radio-frequency test station. The DUT may include at least one antenna, wireless communications circuitry associated with the antenna, and other peripheral components such as a camera module, a display module, and audio circuitry. The test station may include a shielded enclosure in which the DUT is placed during testing. The DUT need not be electrically wired to any test equipment. The DUT may be configured to operate in self test mode. The DUT may be configured to obtain baseline noise floor measurements while all the peripheral components are deactivated and may be configured to obtain elevated noise floor measurements while selectively activating desired subsets of the peripheral components. The difference between the elevated and baseline noise floor measurements may be computed to determine whether at least some of the peripheral components negatively impact the antenna performance by an excessive amount.

Methods for testing wireless electronic devices using automatic self-test mode

A low profile, space efficient circuit shield is disclosed. The shield includes top and bottom metal layers disposed on the top of and below an integrated circuit. In one embodiment the shield can include edge plating arranged to encircle the edges of the integrated circuit and couple the top and bottom metal layers together. In another embodiment, the shield can include through vias arranged to encircle the edges of the integrated circuit and couple the top and bottom metal layers together. In yet another embodiment, passive components can be disposed adjacent to the integrated circuit within the shield.

Low profile, space efficient circuit shields

Stacked arrays of components are disclosed. In one embodiment, a first and a second layer of components are electrically and mechanically coupled to a thin interposer disposed between the first and second layers. The first layer can be configured to attach the stacked array to a host printed circuit board. The interposer can insulate the components from one another and also couple signals between the components on the first and second layers. In one embodiment, the components in the first and second layers are passive components.

Three dimensional passive multi-component structures

Stacked arrays of components are disclosed. In one embodiment, a first and a second layer of components are electrically and mechanically coupled to an interposer with an encapsulated third layer of components disposed between the first and second layers. The first layer can be configured to attach the stacked array to a host printed circuit board. The interposer can couple signals between the components on the first and second layers.

Growing community of inventors

Mountain View, CA, United States of America

Jeffrey M Thoma