Sun Microsystems, Inc.

Jeffrey M Broughton

Derek E Pappas

Earl T Cohen

David R Emberson

Thomas M McWilliams

Michael W Parkin

Liang T Chen

Jeffrey B Rubin

James B Burr

Ashley N Saulsbury

David S Allison

William Kwei-Cheung Lam

Ihao Chen

Oyekunle A Olukotun

Ankur Narang

Nyles I Nettleton

Michael S Ball

Deepankar Bairagi

A method for compiling a cycle-based design involves generating a parsed cycle-based design from the cycle-based design, elaborating the parsed cycle-based design to an annotated syntax tree, translating the annotated syntax tree to an intermediate form, and converting the intermediate form to an executable form.

Method and apparatus for simulation system compiler

A method and apparatus for computation is provided. A main cluster crossbar is connected to a plurality of statically scheduled routing processors. A first sub-cluster crossbar is associated with a first one of the plurality of statically scheduled routing processors where the first sub-cluster crossbar is connected to a first plurality of execution processors. A second sub-cluster crossbar is associated with a second one of the plurality of statically scheduled routing processors where the second sub-cluster crossbar is connected to a second plurality of execution processors.

Method and apparatus for simulation processor

A computer system for cycle-based computation includes a processor array, a translation component adapted to translate a cycle-based design, a host computer operatively connected to the processor array and to the translation component, a data connection component interconnecting a plurality of members of the processor array using static routing, a synchronization component enabling known timing relationships among the plurality of members of the processor array, a host service request component adapted to send a host service request from a member of the processor array to the host computer, and an access component adapted to access a portion of a state of the processor array and a portion of a state of the data connection.

Method and apparatus for cycle-based computation

A method for controlling a processor array by a host computer involves creating a graph of a plurality of nodes using a data connection component, configuring a broadcast tree from a spanning tree of the graph, propagating a first command from the host computer to a member of the processor array using the broadcast tree, configuring a reply tree from a spanning tree of the graph, transmitting a response from the member of the processor array to the host computer using the reply tree, and configuring the data connection component to send at least one message selected from the first command and the response on at least one run mode communication path.

Method and apparatus for controlling a massively parallel processing environment

A method for executing an instruction stream includes partitioning the instruction stream using a partition point to obtain a first partition of the instruction stream and a second partition of the instruction stream, configuring the first partition and the second partition to fit separate e-caches, analyzing the first partition and the second partition to generate a runtime execution facility and a data transfer facility, and executing the first partition and the second partition on separate processors using the runtime execution facility and the data transfer facility.

Method to partition large code across multiple e-caches

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Palo Alto, CA, United States of America

Jeffrey M Broughton