Other

Qualcomm Incorporated

Motorola Corporation

Sirf Technology, Inc.

Csr Technology Inc.

Qualcomm Technologies International, Ltd.

Google Technology Holdings LLC

Jeffrey Koeller

Noshir Behli Dubash

Daniel Babitch

Douglas W Schucker

Luis Briones

Jeffrey J Ogren

Jeff Ogren

Raja Tupelly

Doug Schucker

Fedor Danilenko

Francis Casey

Jeffrey Ogren

Douglas Schucker

A method for low power communication links between wireless devices is described. The method includes establishing, by a first wireless device, a first magnetic communication link to a source wireless device through a human body. The method also includes establishing, by a second wireless device, a second magnetic communication link to the source wireless device through the human body. The method also includes receiving, by the first wireless device via the first magnetic communication link and the second wireless device via the second magnetic communication link, communications from the source wireless device through the human body.

Low power communication links between wireless devices

A radio frequency (RF) receiver that includes a low noise amplifier (LNA), a tunable resonant circuit, and a processor for performing calibration of the RF receiver. The processor is configured to sweep the tunable resonant circuit through a dynamic range of resonant frequency settings while estimating noise signal output power at the LNA at each setting. The processor is also configured to set the tunable resonant circuit to the setting that produces the greatest noise signal power output at the LNA.

Frequency tuning of narrowband low noise amplifiers

A Radio Frequency Receiver on a Single Integrated Circuit ('RFSIC') is described. The RFSIC may include a mixer, a phase-locked loop ('PLL') in signal communication with the mixer, and an on-chip auto-tuned RF filter in signal communication with both the mixer and PPL, such that the same PLL simultaneously tunes the frequency of the VCO and the frequency response of the auto-tuned RF filter.

Auto-tuning system for an On-Chip RF filter

Auto-tuning system for an on-chip RF filter

A high-frequency phase locked loop synthesizer having a selectable fractional-N divider and integer divider along with a phase frequency detector implemented as a CMOS logic block.

Digital synthesizer for low power location receivers

A monolithic wireless receiver suitable for use in a global positioning system (GPS) or other radio frequency (RF) application suitably includes a mixed-mode integrated circuit and a stacked memory device. The mixed mode integrated circuit appropriately includes a digital portion and an analog portion on a common die. The analog portion implements an RF receiver circuit, and the digital portion includes a signal processor that communicates with the RF receiver. The memory device appropriately communicates with the integrated circuit to store electronic instructions and data for the signal processor. The monolithic receiver may be conveniently integrated into a portable electronics device such as a camera, personal digital assistant (PDA), portable phone or the like to provide location sensing or other RF functionality.

Wireless receiver with stacked, single chip architecture

Growing community of inventors

Mesa, AZ, United States of America

Jeffrey Koeller