Amazon Technologies, Inc.

Cyberoptics Semiconductor, Inc.

Elemental Technologies, Inc.

Cyberoptics Semiconductors, Inc.

Jeffrey K Lassahn

Timothy B Prins

Ryan Paul Hegar

Trevor Wells

DelRae H Gardner

Craig C Ramsey

Greg Huntzinger

Kevin Moore

Brian Lewis

Michael Reddick Coleman

An apparatus including a first module and a second module. The first module may be configured to generate one or more values based upon an analysis of one or more samples of a first frame. The second module may be configured to encode one or more samples of a second frame taking into account the one or more values generated by the first module. The one or more values generally represent a measure of an effect on the one or more samples of the first frame of encoding decisions made during encoding of the one or more samples of the second frame.

Estimated macroblock distortion co-optimization

A contribution encoder receives media from a source, encodes the media, and transmits the encoded media to a network-adaptive encoding system for eventual distribution to end users. The network-adaptive encoding system tests a network connection between the contribution encoder and the network-adaptive encoding system before transmission of the encoded media begins. The network-adaptive encoding system uses the results of the test to select appropriate values for parameters that define the encoding and transmission of the media. The selected parameter values are transmitted by the network-adaptive encoding system to the contribution encoder for use in encoding and transmitting the media.

Network-adaptive live media encoding system

Methods, systems, and computer-readable media for bitrate allocation for a multichannel media stream are disclosed. Complexity values are determined for individual channels of a set of channels of a multichannel media stream. The complexity values are determined based (at least in part) on frames of the individual channels during a window of time. The multichannel media stream is associated with a maximum aggregate bitrate, and the individual channels are associated with minimum individual bitrates and maximum individual bitrates. Individual bitrates are determined for the individual channels based (at least in part) on the complexity values. The sum of the individual bitrates does not exceed the maximum aggregate bitrate beyond a predetermined threshold, and the individual bitrates fall between the minimum and maximum individual bitrates of the corresponding individual channels. The individual channels are encoded at bitrates approximating the corresponding individual bitrates and transmitted to one or more recipients.

Bitrate allocation for a multichannel media stream

An encoding or transcoding system uses hypothetical reference decoder occupancy data to at least calculate parameters for output buffers for data streams. An output thread receives HRD buffer occupancy data and calculates buffer occupancy based on duration, rather than absolute occupancy, and correlates the HRD buffer occupancy data with target durations for buffered packets prior to release from the buffer.

Encoder-sensitive stream buffer management

An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit includes an array of software-configurable general purpose processors, a globally-shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors has access to the globally-shared memory to execute one or more portions of at least one of (i) a decoding program, (ii) an encoding program, and (iii) an encoding and decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a map array describing a position of block data in one or more associated arrays.

Block mapping in high efficiency video coding compliant encoders and decoders

An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit generally includes an array of software-configurable general purpose processors, a globally shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors generally has access to the globally shared memory to execute one or more portions of a decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a schedule describing which of the one or more portions of the decoding program are to be executed by each of the software-configurable general purpose processors.

Sweep dependency based graphics processing unit block scheduling

A wireless substrate-like sensor is provided to facilitate alignment and calibration of semiconductor processing systems. The wireless substrate-like sensor includes an optical image acquisition system that acquires one or more images of targets placed within the semiconductor processing system. Analysis of images of the targets obtained by the wireless substrate-like sensor provides position and/or orientation information in at least three degrees of freedom. An additional target is affixed to a known location within the semiconductor processing system such that imaging the reference position with the wireless substrate-like sensor allows the measurement and compensation for pick-up errors.

Growing community of inventors

Seattle, WA, United States of America

Jeffrey K Lassahn