Intel Corporation

Jeffrey J Evertt

Kerry Dean Tedrow

Jahanshir J Javanifard

Gregory E Atwood

Jin-lien Lin

A low frequency oscillator is described. The low frequency oscillator has a bias circuit including a metal-oxide semiconductor (MOS) resistor. A biased ring oscillator is coupled to the bias circuit. The biased ring oscillator includes multiple current limiting transistors.

Oscillator for simultaneously generating multiple clock signals of different frequencies

A negative voltage switching circuit in a nonvolatile memory includes a switching transistor coupled to an output of the negative voltage switching circuit and a first voltage source that has a voltage level substantially lower than zero volts. A pull-up circuit is coupled to a control terminal of the switching transistor and selectively to a second voltage source having a voltage level substantially above zero volts. The pull-up circuit applies the second voltage source to the control terminal of the switching transistor when the pull-up circuit is coupled to the second voltage source such that the switching transistor does not couple the first voltage source to the output. A pull-down circuit is coupled to the first voltage source and the control terminal of the switching transistor. The pull-down circuit applies the first voltage source to the control terminal of the switching transistor when the pull-up circuit is not coupled to the second voltage source such that the switching transistor couples the first voltage source to the output.

Negative voltage switch architecture for a nonvolatile memory

A variable stage charge pump for a flash memory device is described. The variable stage charge pump includes a first charge pump and a second charge pump. A first switch couples an output of the first charge pump to an input of the second charge pump. A second switch couples an input of the first charge pump to the input of the second charge pump. The first and second charge pump are series-coupled to a common output node when the first switch is in a first position and the second switch is in a second position, wherein the first and second charge pumps are parallel-coupled to the common output node when the first switch is in the second position and the second switch is in the first position.

Variable stage charge pump

A variable stage charge pump for a flash memory device is described. The variable stage charge pump includes a first charge pump and a second charge pump. A first switch couples an output of the first charge pump to an input of the second charge pump. A second switch couples an input of the first charge pump to the input of the second charge pump. The first and second charge pumps are series-coupled to a common output node when the first switch is in a first position and the second switch is in a second position, wherein the first and second charge pumps are parallel-coupled to the common output node when the first switch is in the second position and the second switch is in the first position.

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Orangevale, CA, United States of America

Jeffrey J Evertt