Altera Corporation

Jeffrey Eastlack

Martin Langhammer

David James Shippy

An accelerated processor structure on a programmable integrated circuit device includes a processor and a plurality of configurable digital signal processors (DSPs). Each configurable DSP includes a circuit block, which in turn includes a plurality of multipliers. The accelerated processor structure further includes a first bus to transfer data from the processor to the configurable DSPs, and a second bus to transfer data from the configurable DSPs to the processor.

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Driftwood, TX, United States of America

Jeffrey Eastlack