Teledyne Scientific and Imaging, LLC

Teledyne Licensing, LLC

Rockwell Scientific Licensing LLC

The Boeing Company

Coldquanta, Inc.

Jeffrey DeNatale

Philip Stupar

Robert L Borwick, Iii

Alexandros Papavasiliou

Chialun Tsai

Robert Mihailovich

Martin William Kendig

Stefan Clemens Lauxtermann

Yu-Hua Kao Lin

William E Tennant

Jonathan Bruce Hacker

David J Gulbransen

Per-Olov Pettersson

Viktor Tarashansky

Alex Papavasiliou

Frederick Michael Discenzo

D Morgan Tench

Vivek Mehrotra

Rahul Ganguli

Jun Jason Yao

Dennis R Strauss

Alan B Harker

Atul Joshi

Robert J Anderson

Donald E Cooper

John White

Ya-Chi Chen

Chuan-hua Chen

Maximillian Adriano Perez

Les Warren

Chailun Tsai

Zhimin J Yao

Kathleen Garrett

Morgan Tench

Sangtae Park

Alan Roll

William R Norvell

A micro-machined optical shutter includes an entry layer with a through-passage having an input side adapted to receive incoming light and an output side, and an exit layer with a through-passage having an input side comprising a pinhole and an output side. The entry and exit layers are vertically aligned, thereby providing an optical path such that light exiting the entry layer enters the exit layer via the pinhole unless the optical path is interrupted. An actuation plane positioned between the entry and exit layers comprises a shutter blade and an actuator arranged to move the shutter blade laterally with respect to the pinhole when actuated. The shutter blade preferably has a reflective angled surface such that, when the blade covers the pinhole, the angled surface redirects light on the optical path away from the pinhole, preferably into a micromachined beam dump.

Compact, high-performance MEMS-based optical shutter

A physics package apparatus for a compact atomic device includes a container having a plurality of slots and an open end, a first vapor cell carrier slidably seated in one of the plurality of slots, a vapor cell coupled to the first vapor cell carrier; and a lid sealably enclosing the open end so that the vapor cell is sealably enclosed in the container.

Physics package for compact atomic device

A magnetic field coil assembly includes a plurality of stacked dielectric layers, each of the plurality of stacked dielectric layers having a partial-loop conductive trace on a first side of the layer, a via interconnect in communication with the partial-loop conductive trace and extending from the first side of the layer to a side of the layer opposite from the first side, and a vapor cell reception aperture; and a vapor cell axially extending through the plurality of vapor cell reception apertures so that the plurality of partial-loop conductive traces is electrically connected serially to form a continuous coil disposed around the vapor cell that would create a magnetic field upon application of a current.

Integrated field coil for compact atomic devices

An arrangement for making electrical contact to a vertical capacitor having top and bottom metal layers separated by a dielectric, and at least one trench. Recesses are formed in an oxide layer over the capacitor to provide access to the top and bottom metal layers. The recesses include contacting portions preferably positioned such that there is no overlap between them and any of the trenches. Metal in the recesses, preferably copper, forms electrical contacts to the vertical capacitor's metal layers and enables reliable bonding to copper metallization on other layers such as an ROIC layer. 'Dummy' capacitors may be tiled on portions of the IC where there are no vertical capacitors, preferably with the top surfaces of their top metal at a height approximately equal to that of the top surface of the vertical capacitor's top metal, thereby enabling the IC to be planarized with a uniform planarization thickness.

Vertical capacitor contact arrangement

A micro-fabricated electromagnetic device is provided for on-circuit integration. The electromagnetic device includes a core. The core has a plurality of electrically insulating layers positioned alternatingly between a plurality of magnetic layers to collectively form a continuous laminate having alternating magnetic and electrically insulating layers. The electromagnetic device includes a coil embedded in openings of the semiconductor substrate. An insulating material is positioned in the cavity and between the coil and an inner surface of the core. A method of manufacturing the electromagnetic device includes providing a semiconductor substrate having openings formed therein. Windings of a coil are electroplated and embedded in the openings. The insulating material is coated on or around an exposed surface of the coil. Alternating magnetic layers and electrically insulating layers may be micro-fabricated and electroplated as a single and substantially continuous segment on or around the insulating material.

Micro-fabricated integrated coil and magnetic circuit and method of manufacturing thereof

An apparatus for providing localized heating as well as protection for a vibrating MEMS device. A cap over a MEMS gyroscope includes an embedded temperature sensor and a heater. The temperature sensor is a trace made of a material with a known temperature/resistance coefficient, which loops back along itself to reduce electromagnetic interference. The heater is a resistive metal trace which also loops back along itself. The temperature sensor and the heater provide localized temperature stabilization for the MEMS gyroscope to reduce temperature drift in the MEMS gyroscope.

MEMS device with integrated temperature stabilization

A self-aligning hybridization method enabling small pixel pitch hybridizations with self-alignment and run-out protection. The method requires providing a first IC, the surface of which includes at least one electrical contact for connection to a mating IC, depositing an insulating layer on the IC's surface, patterning and etching the insulating layer to provide recesses in the insulating layer above each of the electrical contacts, and depositing a deformable conductive material in each of the recesses. A mating IC is provided which includes conductive pins positioned to align with the deformable conductive material in respective ones of the recesses on the first chip. The first and mating ICs are then hybridized by bringing the conductive pins into contact with the deformable conductive material in the recesses, such that the conductive material deforms and the pins make electrical contact with the first IC's electrical contacts.

Self-aligning hybridization method

A method of fabricating silicon waveguides with embedded active circuitry from silicon-on-insulator wafers utilizes photolithographic microfabrication techniques to define waveguide structures and embedded circuit recesses for receiving integrated circuitry. The method utilizes a double masking layer, one layer of which at least partially defines at least one waveguide and the other layer of which at least partially defines the at least one waveguide and at least one embedded circuit recess. The photolithographic microfabrication techniques are sufficiently precise for the required small structural features of high frequency waveguides and the double masking layer allows the method to be completed more efficiently. The basic fabrication method may be extended to provide batch arrays to mass produce silicon waveguide devices.

Method of fabricating silicon waveguides with embedded active circuitry

An apparatus includes a chip-scale atomic clock (CSAC) alkali vapor cell seated on a silicon substrate that is suspended in a package by a metalized Parylene strap having Parylene anchors embedded in a silicon frame, the Parylene strap comprising an extended rigidizing structure, and a plurality of electrical pins extending into an interior of the package, the plurality of electrical pins in electrical communication with the CSAC cell through the metalized Parylene strap, where the CSAC cell is mechanically connected to the package and thermally insulated from the package.

Micro-scale system to provide thermal isolation and electrical communication between substrates

A hybridization method comprises providing a first IC, depositing a first metal layer over electrical contacts on the IC, depositing an insulating layer over the first metal layer and contacts, providing recesses in the insulating layer above each contact, and depositing metal such that the sidewalls of the recesses provide electrical continuity between the top of each recess and the electrical contact it is above. The recesses are backfilled with a sacrificial planarization material and planarized, and a second metal layer is deposited, patterned and etched over each backfilled recess to form openings over each recess and to separate the pixels. The sacrificial planarization material is removed to form compliant structures overhanging the recesses and thereby creating micro-sockets capable of receiving corresponding conductive pins associated with a mating IC. Electrical contact between the first and mating ICs is accomplished through shear between the pins and the micro-sockets.

Compliant micro-socket hybridization method

Microfabricated inductors with through-wafer vias and including a first wafer and a second wafer, each wafer having a plurality of metal fillings therein, and a plurality of metal conductors connecting the plurality of metal fillings together to form a spiral. A method for producing an inductor including steps of forming a first plurality of vias in a first substrate, filling the first plurality of vias in the first substrate with a first plurality of metal fillings, forming a first plurality of metal conductors, connecting pairs of the first plurality of metal fillings together using the first plurality of metal conductors to form a spiral, performing the foregoing steps similarly on a second substrate formed with a second plurality of vias filled with a second plurality of metal fillings, and bonding the first substrate with the second substrate.

Microfabricated inductors with through-wafer vias

An imaging array comprises a photodetector layer, a readout IC (ROIC) layer, and a charge storage capacitor layer which is distinct from the photodetector and ROIC layers; the layers are electrically interconnected to form the array. The capacitors within the charge storage capacitor layer are preferably micromachined; the charge storage capacitor layer can be an interposer layer or an outer layer.

Imaging array device structure with separate charge storage capacitor layer

A method is disclosed for manufacturing a chip-scale optics module for an optical interrogator. The method includes aligning a polarization axis of a linear polarizer to an angle of 45 degrees from a fast axis of a quarter wave plate to enable circular polarization of a beam, when a beam is introduced to the linear polarizer, coupling the linear polarizer to the quarter wave plate after the aligning to form a circular polarizing filter sheet and then dicing the circular polarizing filter sheet to obtain a plurality of chip-scale circular polarizing filters. Each of the chip-scale circular polarizing filters is diced to have an edge that defines a polarization location index for the linear polarizer. A linear polarizer plate face of one of the chip-scale circular polarizing filters is then positioned so that the linear polarizer plate face is aligned with and parallel to an output face of a laser, whereby the polarization axis of the linear polarizer is not orthogonal to a polarization axis of the laser. The chip-scale circular polarizing filter is coupled to a frame after the positioning step.

Chip-scale optics module for optical interrogators

The present invention relates to a method for adjusting the resonant frequencies of a vibrating microelectromechanical (MEMS) device. In one embodiment, the present invention is a method for adjusting the resonant frequencies of a vibrating mass including the steps of patterning a surface of a device layer of the vibrating mass with a mask, etching the vibrating mass to define a structure of the vibrating mass, determining a first set of resonant frequencies of the vibrating mass, determining a mass removal amount of the vibrating mass and a mass removal location of the vibrating mass to obtain a second set of resonant frequencies of the vibrating mass, removing the mask at the mass removal location, and etching the vibrating mass to remove the mass removal amount of the vibrating mass at the mass removal location of the vibrating mass.

Method for adjusting resonance frequencies of a vibrating microelectromechanical device

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Thousand Oaks, CA, United States of America

Jeffrey DeNatale