Altera Corporation

Enpirion, Inc.

Jeffrey Demski

Douglas D Lopata

Jay Norton

Ashraf W Lotfi

John David Weld

Anatoly Feygenson

Mirmira Ramarao Dwarakanath

Miguel Rojas-Gonzales

Ahmed Mohamed Abou-Alfotouh

Miguel Rojas-Gonzalez

A circuit system includes a current sensor circuit, a subtractor circuit, a multiplier circuit, and a divider circuit. The current sensor circuit generates a current sense signal that indicates a current through an inductor. The circuit system generates a current value based on the current sense signal. The subtractor circuit determines a voltage difference across the inductor. The multiplier circuit multiplies the voltage difference by a time period that the voltage difference is applied across the inductor to generate a product. The divider circuit divides the product by the current value to generate an estimated inductance of the inductor.

Techniques for determining inductances

An integrated current replicator includes a first current sense resistor configured to sense a first input current to a power converter during a primary portion of a duty cycle and a first transconductance amplifier configured produce a first voltage at a common circuit node proportional to the first input current during the primary portion of the duty cycle. The integrated current replicator includes a second current sense resistor configured to sense a second input current to the power converter during a complementary portion of the duty cycle and a second transconductance amplifier configured produce a second voltage at the common circuit node proportional to the second input current during the complementary portion of the duty cycle. The integrated current replicator includes an amplifier configured to produce a voltage replicating the first input current and the second input current from the first voltage and the second voltage.

Integrated current replicator and method of operating the same

A semiconductor device including a resistor metallic layer and method forming the same. In one embodiment, the semiconductor device includes a source region and a drain region of a power switch on a substrate. The semiconductor device also includes the resistor metallic layer over the source region and the drain region of the power switch. The resistor metallic layer includes a current sense resistor including a first current sense resistor metallic strip coupled between a first cross member and a second cross member, and a first gain resistor including a first gain resistor metallic strip coupled to the first cross member. The semiconductor device also includes an amplifier over the substrate and coupled to the first gain resistor metallic strip.

Semiconductor device including a resistor metallic layer and method of forming the same

A semiconductor device and method of forming the same including, in one embodiment, a semiconductor die formed with a plurality of laterally diffused metal oxide semiconductor ('LDMOS') cells. The semiconductor device also includes a redistribution layer electrically coupled to the plurality of LDMOS cells and a plurality of metallic pillars distributed over and electrically coupled to the redistribution layer.

Semiconductor device including a redistribution layer and metallic pillars coupled thereto

A controller and an output filter for a power converter, and a power converter employing at least one of the same. In one embodiment, the controller includes an error amplifier with first and second input terminals coupled to one of an operating characteristic and a reference voltage of the power converter, and a switch configured to couple the first and second input terminals to one of the operating characteristic and the reference voltage as a function of a power conversion mode of the power converter. In one embodiment, the output filter includes an output filter capacitor with a first terminal coupled to a first output terminal of a power converter, and an output filter inductor coupled between a second terminal of the output filter capacitor and a second output terminal of the power converter.

Power converter with a dynamically configurable controller and output filter

A semiconductor device including a resistor metallic layer and method forming the same. In one embodiment, the semiconductor device includes a source region and a drain region of a semiconductor switch on a substrate. The semiconductor device also includes the resistor metallic layer over the source region and the drain region of the semiconductor switch. The resistor metallic layer includes a first resistor with a first resistor metallic strip coupled between a first cross member and a second cross member of the resistor metallic layer.

A semiconductor device and method of forming the same including, in one embodiment, a semiconductor die formed with a plurality of laterally diffused metal oxide semiconductor ('LDMOS') cells, and a metallic layer electrically coupled to the plurality of LDMOS cells. The semiconductor device also includes a plurality of gate drivers positioned along a periphery of the semiconductor die and electrically coupled to gates of the plurality of LDMOS cells through the metallic layer.

Semiconductor device including gate drivers around a periphery thereof

A semiconductor device and method of forming the same including, in one embodiment, a substrate and a plurality of source and drain regions formed as alternating pattern on the substrate. The semiconductor device also includes a plurality of gates formed over the substrate between and parallel to ones of the plurality of source and drain regions. The semiconductor device also includes a first plurality of alternating source and drain metallic strips formed in a first metallic layer above the substrate and parallel to and forming an electrical contact with respective ones of the plurality of source and drain regions.

Growing community of inventors

Orefield, PA, United States of America

Jeffrey Demski