Texas Instruments Corporation

Burr-brown Corporation

Jeffrey David Johnson

Jimmy R Naylor

Timothy V Kalthoff

Miroslav Oljaca

Mark Allan Shill

Masahiro Yoshioka

A bandgap voltage reference circuit includes first and second transistors (e.g., 3-terminal BJTs or diode-connected BJTs), and a PTAT element (e.g., resistance or capacitance). The first transistor is at a first die location, and operates with a first base-emitter voltage. The second transistor is at a second die location, and operates with a second base-emitter voltage. Each of the first and second transistors may include multiple individual parallel-connected transistors. The PTAT element is operatively coupled to the first and second transistors such that a voltage difference between the first and second base-emitter voltages drops across the PTAT element. The first and second locations are separated by a distance (e.g., 1.5% or more of die length, or such that the respective centroids of the first and second transistor are spaced from one another). Such spatial distribution helps mitigate voltage shift induced by mechanical stress, and is insensitive to process variation.

Mitigation of voltage shift induced by mechanical stress in bandgap voltage reference circuits

A fan control system and method that maintains the operating temperature of computer and electronic devices or components at about a predetermined control level to minimize power consumption and audible noise. The fan control system is a programmable closed loop system including a temperature sensor, first and second fan controllers, and a fan/motor assembly including a power converter, a motor, and a fan. The first fan controller provides programmable acceleration/deceleration of the fan during an initial fan spin up, and the second fan controller runs the fan only as fast as necessary to keep the sensed temperature level of a computer device as close as possible to the predetermined control level, thereby minimizing the power consumption of the system and the audible noise of the fan.

Advanced programmable closed loop fan control method

The temperature of an internally or remotely sensed diode is determined using sequential currents applied to the diode, while compensating for parasitic resistance effects on the sensed diode so that the temperature indication is accurate. A method or circuit is provided which isolates the parasitic resistance value itself or a voltage representative of the parasitic resistance, so that an error compensation value can be obtained for use in subsequent measurements.

Remote diode temperature sense method with parasitic resistance cancellation

An improved circuit and method is provided that can increase the slew rate of an operational amplifier without adversely affecting its response time. An operational amplifier comprises a large signal detector, a bias circuit having a bias override component, and a bias decay circuit. As a result, the operational amplifier provides the ability to control the increase in current supplied to its compensation capacitors while also providing a smooth transition to the decay phase. In accordance with an exemplary embodiment of the present invention, an exponential decay to the increased bias condition is provided.

Slew rate enhancement circuit

A digital-to-analog converter includes a resistive divider network including a plurality of series resistors of resistance R and a plurality of shunt resistors of resistance 2R' and a circuit for switching a shunt resistor of the resistive divider network in the digital-to-analog converter to either of first and second reference voltages. The switching circuit includes a first switch MOSFET coupling the low reference voltage to the shunt resistor, and a second switch MOSFET coupling the shunt resistor to the high reference voltage. First and second switch control circuits adjust the on resistances of the first and second switch MOSFETs to be proportional to the resistances of first and second reference resistors, which have the same temperature coefficient as the resistors of which the divider network is composed. The on resistance of each of the first and second switch MOSFETs is equal to R.sub.ONi, and the resistance 2R' is equal to 2R-R.sub.ONi. The on resistances do not need to be binarily scaled.

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Tucson, AZ, United States of America

Jeffrey David Johnson