Advanced Micro Devices Corporation

Samsung Electronics Co., Ltd.

Jeffrey Christopher Allan

Skyler Jonathon Saleh

Fataneh Ghodrat

Jeongae Park

Wilson Wai Lun Fung

Zhenhong Liu

Balakrishnan Sundararaman

Data routing for efficient decompressor use is described. In accordance with the described techniques, a cache controller receives requests from multiple requestors for elements of data stored in a compressed format in a cache. The requests include at least a first request from a first requestor and a second request from a second requestor. A decompression routing system identifies a redundant element of data requested by both the first requestor and the second requestor and causes decompressors to decompress the requested elements of data. The decompression includes performing a single decompression of the redundant element. After the decompression, the decompression routing system routes the decompressed elements to the plurality of requestors, which includes routing the decompressed redundant element to both the first requestor and the second requestor.

Data routing for efficient decompression of compressed data stored in a cache

A technique for performing ray tracing operations is provided. The technique includes traversing through a bounding volume hierarchy to an instance node; performing an instance node transform using common circuitry; traversing to a leaf node of the bounding volume hierarchy; and performing an intersection test for the leaf node using the common circuitry.

Common circuitry for triangle intersection and instance transformation for ray tracing

A technique for performing ray tracing operations is provided. The technique includes processing small bounding box nodes in a box intersection test circuit to generate intersection test results for the small bounding box nodes; and processing large bounding box nodes in the box intersection test circuit to generate intersection test results for the large bounding box nodes.

Variable width bounding volume hierarchy nodes

Guided cache replacement is described. In accordance with the described techniques, a request to access a cache is received, and a cache replacement policy which controls loading data into the cache is accessed. The cache replacement policy includes a tree structure having nodes corresponding to cachelines of the cache and a traversal algorithm controlling traversal of the tree structure to select one of the cachelines. Traversal of the tree structure is guided using the traversal algorithm to select a cacheline to allocate to the request. The guided traversal modifies at least one decision of the traversal algorithm to avoid selection of a non-replaceable cacheline.

Guided cache replacement

Techniques are disclosed for processing cache operations. The techniques include determining a set of cache lines that include data for a vector memory access request; determining bank allocation priorities for the set of cache lines, wherein the bank allocation priorities are chosen to result in the set of cache lines being evenly distributed among the banks; determining actual banks for the set of cache lines; and accessing the cache lines in one or more access iterations, wherein at least one of the one or more access iterations includes accessing multiple cache lines in different banks at the same time.

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Boxborough, MA, United States of America

Jeffrey Christopher Allan