Indigo Systems Corporation

Flir Systems, Incorporated

Amber Engineering, Inc.

Santa Barbara Research Center

Jeffrey Brian Barton

William J Parrish

Richard E Bornfreund

Theodore R Hoelter

Eric Frank Schulte

Naseem Y Aziz

Charles A Cockrum

Arthur H Lockwood

Joseph H Durham

Diane M Salazar

Adrienne N Costello

In one embodiment, a detector includes an AlInSb absorber layer, and an AlInSb passivation layer disposed above the AlInSb absorber layer, wherein x&#x3c;y. The detector further includes a junction formed in a region of the AlInSb absorber layer, and a metal contact disposed above the junction and through the AlInSb passivation layer.

Aluminum indium antimonide focal plane array

In one embodiment, a detector includes an AlInSb passivation/etch stop layer, an AlInSb absorber layer disposed above the AlnSb passivation/etch stop layer, and an AlInSb passivation layer disposed above the AlInSb absorber layer, wherein x&#x3c;z and x&#x3c;y. The detector further includes a junction formed in a region of the AlInSb absorber layer, and a metal contact disposed above the junction and through the AlInSb passivation layer.

Systems and methods are disclosed for forming interconnects between semiconductor devices in accordance with one or more embodiments of the present invention. For example, a method of forming interconnects between semiconductor devices includes depositing a plurality of first contacts on a plurality of corresponding first pads of a first semiconductor device; forming a plurality of plated contacts on a plurality of corresponding second pads of a second semiconductor device; aligning the plurality of first contacts with the plurality of plated contacts; and joining the plurality of first contacts to the plurality of plated contacts to form the interconnects between the first semiconductor device and the second semiconductor device.

Semiconductor device interconnect systems and methods

Systems and methods are disclosed for measuring a distance (or gap) between substrates of a hybrid semiconductor. The measurements may be made during a hybridization process to, for example, provide alignment feedback during the hybridization process. The measurements may also be made after the hybridization process to further calibrate the process or to provide information useful for further processing operations.

Hybrid gap measurement circuit

An infrared detector is disclosed having a first substrate made of indium phosphide and a first layer formed on the first substrate and made of indium gallium arsenide. The infrared detector further includes a second substrate, which is made of silicon and has a readout integrated circuit that is electrically coupled to the first layer. After the indium gallium arsenide material is formed, the first substrate is substantially thinned or removed by mechanical techniques and/or a chemical etch process to extend the spectral range of the infrared detector to wavelengths beyond that of a conventional infrared detector.

Infrared detector array with improved spectral range and method for making the same

Methods of forming arrays of electrical interconnects between substrates are provided. These methods allow the use of large interconnect bump arrays to physically and electrically connect substrates without the need to use excess pressure on the substrates to form the interconnects, thus reducing damage to the substrates. To form the interconnects, an array of bumps is formed on a first substrate from a material that forms a eutectic composition with a second material. An array of bumps composed of the second material is formed on the second substrate. The arrays are aligned and the bumps contacted at a temperature above the eutectic temperature of the eutectic composition. Each of the bumps on the first substrate melts and diffuises into the corresponding bumps on the second substrate to form the interconnects.

Method for electrically interconnecting large contact arrays using eutectic alloy bumping

Methods for forming die that have minimal edge and surface damage are provided. Die formed by these methods are less susceptible to cracking and breakage. Thus, yield and performance of devices fabricated with die formed by these methods are advantageously improved. To form the die, trenches are formed in a wafer around the peripheral edge of the die by processes that cause only minimal damage to the edges of the die. The wafer is cut through the trenches into sections containing the die without contacting the edge of the die. The sections are then mounted onto a holder and thinned to produce the die.

Crystal thinning method for improved yield and reliability

A system and method for isothermally growing HgCdTe having improved material uniformity and run-to-run repeatability employs a growth solution vessel in which a substrate may be inserted. The growth solution is heated and maintained at a constant temperature while causing Hg to vaporize and rise within the growth solution vessel. A water-cooling jacket causes the Hg to condense and form on the walls of the growth solution vessel. The Hg condensate is directed into a calibrated reservoir. HgCdTe growth continues as the Hg is depleted from the growth solution and fills the reservoir. The reservoir is calibrated to hold the specific amount of Hg condensate corresponding to the desired layer of HgCdTe. The reservoir overflows when full and directs the overflow into the growth solution, causing HgCdTe formation to cease. The volume of the reservoir may be altered to capture more or less Hg condensate, as desired, in order to change the amount of HgCdTe formed on the CdTe substrate.

Method and apparatus for formation of HgCdTe infrared detection layers

A hybrid infrared focal plane array detector employs a detector layer and transparent substrate bonded to a thin semiconductor readout integrated circuit and thicker readout circuit substrate. The readout circuit is rigidly bonded to the readout substrate to form a composite structure having a thermal coefficient of expansion substantially matching that of the detector portion. The hybrid device may be cooled from room temperature to cryogenic operation temperatures without thermal mismatch structural problems.

Thermal mismatch accommodated infrared detector hybrid array

A hybrid infrared focal plane array detector employs a thinned detector layer and substrate directly bonded to a conventional semiconductor readout integrated circuit substrate. The infrared detector layer and transparent substrate is thinned to a thickness of approximately 25-400.mu. to allow the detector to act like a flexible membrane to elastically respond to thermal mismatch due to differing coefficients of thermal expansion between the detector and semiconductor readout circuit as the hybrid device is cooled from manufacturing at room temperature to cryogenic operation temperatures. By thinning the detector substrate to a desired thickness, essentially unlimited hybrid detector sizes may be obtained. Additionally, the detector layer and substrate may be divided into sub-arrays to provide further resistance to stress induced from thermal mismatch.

Infrared detector hybrid array with improved thermal cycle reliability

An array of photodiodes is comprised of a Group II-VI material, such as HgCdTe, which is processed to form a plurality of diode junctions. The array is fabricated by a method which comprises a first step of providing a radiation absorbing base 12 of p-type Hg.sub.(1-x) Cd.sub.x Te material. Each of the photodiodes is fabricated by depositing a layer 18 of wider bandgap passivation material over the substrate, depositing a photomask layer 26 over the passivation layer and selectively removing the passivation layer through openings within the photomask layer. One method of removing the passivation layer 18 is by ion milling which also converts the underlying p-type substrate material to n-type material. The lattice damage caused by the ion milling extends laterally outward such that the n-type region 14, and associated p-n diode junction 16, is disposed beneath the passivation layer 18. Alternatively, the substrate material is converted to an opposite type of conductivity by depositing a layer of source material followed by a diffusion process.

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Goleta, CA, United States of America

Jeffrey Brian Barton