University of California

Jeffrey Bokor

David Carlton

Yang-Kyu Choi

Nathan C Emley

Chenming Hu

Leland Chang

Wen-Chin Lee

Vivek Subramanian

Tsu-Jae King

Yang Yang

Ji Zhu

Patrick P Naulleau

Sayeef Salahuddin

Thomas Schenkel

Gabor A Somorjai

Jeff Grunes

Zheng Gu

Jon Gorchon

Richard Brian Wilson

Brian Lambson

Charles Henri Alexandre Lambert

Yun Lin

Seongtae Jeong

Nick Lindert

Cheuk Chi Lo

Jakub Tadeusz Kedzierski

Xuejue Huang

Christoph Weis

Stephen Lyon

Alexei Tyryshkin

Methods and memory circuits for altering a magnetic direction of a magnetic memory cell using picosecond electric current pulses are disclosed. One method includes directing a first electric current pulse through the magnetic memory cell that includes a ferrimagnetic material layer to heat the ferrimagnetic material layer to toggle a magnetic direction of the ferrimagnetic material layer from a first magnetic direction to a second magnetic direction.

Writing of a magnetic memory with electric pulses

A quantum bit computing architecture includes a plurality of single spin memory donor atoms embedded in a semiconductor layer, a plurality of quantum dots arranged with the semiconductor layer and aligned with the donor atoms, wherein a first voltage applied across at least one pair of the aligned quantum dot and donor atom controls a donor-quantum dot coupling. A method of performing quantum computing in a scalable architecture quantum computing apparatus includes arranging a pattern of single spin memory donor atoms in a semiconductor layer, forming a plurality of quantum dots arranged with the semiconductor layer and aligned with the donor atoms, applying a first voltage across at least one aligned pair of a quantum dot and donor atom to control a donor-quantum dot coupling, and applying a second voltage between one or more quantum dots to control a Heisenberg exchange J coupling between quantum dots and to cause transport of a single spin polarized electron between quantum dots.

Scalable quantum computer architecture with coupled donor-quantum dot qubits

A nanomagnet having widely tunable anisotropy is disclosed. The disclosed nanomagnet is a magnetic particle with a convex shape having a first magnetically easy axis. The convex shape is modified to include at least one concavity to urge a second magnetically easy axis to form substantially offset from the first magnetically easy axis. In at least one embodiment, the convex shape is also modified to include at least one concavity to urge a second magnetically easy axis to form with a magnetic strength substantially different from the first magnetically easy axis.

Concave nanomagnets with widely tunable anisotropy

Fabrication methods disclosed herein provide for a nanoscale structure or a pattern comprising a plurality of nanostructures of specific predetermined position, shape and composition, including nanostructure arrays having large area at high throughput necessary for industrial production. The resultant nanostracture patterns are useful for nanostructure arrays, specifically sensor and catalytic arrays.

Methods for fabrication of positional and compositionally controlled nanostructures on substrate

A nanomagnetic flip-flop, or register. The nanomagnetic register receives a signal from an input signal nanomagnet on a first clock cycle, and provides the input to an output signal nanomagnet on a second clock cycle. The input signal nanomagnet and the output signal nanomagnet are arranged on a substrate. Each of the signal nanomagnets has an easy axis and a hard axis that are substantially in a signal plane. A register nanomagnet is arranged on the substrate between the input signal nanomagnet and the output signal nanomagnet. The register nanomagnet has an easy axis and a hard axis that are substantially in a register plane. The register plane is not coplanar with the signal plane.

Nanomagnetic register

A method and system for propagating signals along a line of nanomagnets. Nanomagnets having an easy axis and a hard axis are provided a biaxial anisotropy term, which increases metastability along the hard axis. The nanomagnets are forced into hard-axis alignment. A magnetization direction of a first nanomagnet is caused to cant upward. Dipole coupling interactions between the first nanomagnet and an adjacent nanomagnet cause a magnetization direction of the adjacent nanomagnet to cant downward in an anti-parallel alignment. This cascade continues reliably along the line of nanomagnets. The biaxial anisotropy term provides additional stability along the hard axis to ensure the nanomagnets do not prematurely align along the easy axis. Various logic gates using nanomagnets, stabilizer nanomagnets, destabilizer nanomagnets, and magnetic diodes are also disclosed.

Nanomagnetic signal propagation and logic gates

An improved phase-shifting point diffraction interferometer can measure both distortion and wavefront aberration. In the preferred embodiment, the interferometer employs an object-plane pinhole array comprising a plurality of object pinholes located between the test optic and the source of electromagnetic radiation and an image-plane mask array that is positioned in the image plane of the test optic. The image-plane mask array comprises a plurality of test windows and corresponding reference pinholes, wherein the positions of the plurality of pinholes in the object-plane pinhole array register with those of the plurality of test windows in image-plane mask array. Electromagnetic radiation that is directed into a first pinhole of object-plane pinhole array thereby creating a first corresponding test beam image on the image-plane mask array. Where distortion is relatively small, it can be directly measured interferometrically by measuring the separation distance between and the orientation of the test beam and reference-beam pinhole and repeating this process for at least one other pinhole of the plurality of pinholes of the object-plane pinhole array. Where the distortion is relative large, it can be measured by using interferometry to direct the stage motion, of a stage supporting the image-plane mask array, and then use the final stage motion as a measure of the distortion.

System for interferometric distortion measurements that define an optical path

An at-wavelength system for extreme ultraviolet lithography mask blank defect detection is provided. When a focused beam of wavelength 13 nm is incident on a defective region of a mask blank, three possible phenomena can occur. The defect will induce an intensity reduction in the specularly reflected beam, scatter incoming photons into an off-specular direction, and change the amplitude and phase of the electric field at the surface which can be monitored through the change in the photoemission current. The magnitude of these changes will depend on the incident beam size, and the nature, extent and size of the defect. Inspection of the mask blank is performed by scanning the mask blank with 13 nm light focused to a spot a few &mgr;m in diameter, while measuring the reflected beam intensity (bright field detection), the scattered beam intensity (dark-field detection) and/or the change in the photoemission current.

Method and apparatus for inspecting reflection masks for defects

A method for performing scanned defect inspection of a collection of contiguous areas using a specified false-alarm-rate and capture-rate within an inspection system that has characteristic seek times between inspection locations. The multi-stage method involves setting an increased false-alarm-rate for a first stage of scanning, wherein subsequent stages of scanning inspect only the detected areas of probable defects at lowered values for the false-alarm-rate. For scanning inspection operations wherein the seek time and area uncertainty is favorable, the method can substantially increase inspection throughput.

Multi-level scanning method for defect inspection

A FinFET device is fabricated using conventional planar MOSFET technology. The device is fabricated in a silicon layer overlying an insulating layer (e.g., SIMOX) with the device extending from the insulating layer as a fin. Double gates are provided over the sides of the channel to provide enhanced drive current and effectively suppress short channel effects. A plurality of channels can be provided between a source and a drain for increased current capacity. In one embodiment two transistors can be stacked in a fin to provide a CMOS transistor pair having a shared gate.

Finfet transistor structures having a double gate channel extending vertically from a substrate and methods of manufacture

Growing community of inventors

Oakland, CA, United States of America

Jeffrey Bokor