Qlogic Corporation

Sun Microsystems, Inc.

Jeffrey B Rubin

Dave Olson

Gregory B Lindahl

Earl T Cohen

Thomas M McWilliams

Michael W Parkin

Derek E Pappas

Liang T Chen

Jeffrey M Broughton

Ashley N Saulsbury

David R Emberson

William Kwei-Cheung Lam

Ihao Chen

Oyekunle A Olukotun

James B Burr

David S Allison

Ankur Narang

Nyles I Nettleton

Michael S Ball

Method and system for a data transfer operation to a device memory is provided. The method includes setting a counter to an initial value; detecting the data transfer operation; determining if information is written to a first memory location of the device memory; counting in a first direction when a total transfer size (N) is written to the first memory location of the device memory; and counting in a second direction when data is written in memory locations other than the first memory location of the device memory, wherein the data transfer operation is complete when a counter value transitions from a non-initial value to an initial value.

Method and system for data transfer

A receiving node sends a token identifier to the data source and receives data from the data source, along with the token identifier. A token identifier identifies a location in memory on the receiving node, but is not the same as an address in the memory. In the described embodiments, a token identifier is an integer value that acts as an index into a token array, which identifies the memory location.

Protocol to implement token ID mechanism for network data transfer

Validation of various portions of received data, including validating a cut-through checksum found in a received data packet. The cut-through checksum is based on data found in a packet header, and thus can be validated before the entire packet is received. This feature allows processing of the received data to begin before the entire packet has been received. Many embodiments will also receive a checksum that is based on the entire packet.

Cut-through decode and reliability

A node in a network that receives data from a data source, such as another node. The receiving node sends a token identifier to the data source and receives data from the data source, along with the token identifier. A token identifier identifies a location in memory on the receiving node, but is not the same as an address in the memory. Thus, a token identifier is preferably neither a physical memory address nor a virtual address.

Token ID mechanism for network data transfer

A method for compiling a cycle-based design involves generating a parsed cycle-based design from the cycle-based design, elaborating the parsed cycle-based design to an annotated syntax tree, translating the annotated syntax tree to an intermediate form, and converting the intermediate form to an executable form.

Method and apparatus for simulation system compiler

A method and apparatus for computation is provided. A main cluster crossbar is connected to a plurality of statically scheduled routing processors. A first sub-cluster crossbar is associated with a first one of the plurality of statically scheduled routing processors where the first sub-cluster crossbar is connected to a first plurality of execution processors. A second sub-cluster crossbar is associated with a second one of the plurality of statically scheduled routing processors where the second sub-cluster crossbar is connected to a second plurality of execution processors.

Method and apparatus for simulation processor

A computer system for cycle-based computation includes a processor array, a translation component adapted to translate a cycle-based design, a host computer operatively connected to the processor array and to the translation component, a data connection component interconnecting a plurality of members of the processor array using static routing, a synchronization component enabling known timing relationships among the plurality of members of the processor array, a host service request component adapted to send a host service request from a member of the processor array to the host computer, and an access component adapted to access a portion of a state of the processor array and a portion of a state of the data connection.

Method and apparatus for cycle-based computation

Growing community of inventors

Pleasanton, CA, United States of America

Jeffrey B Rubin