Koninklijke Philips Corporation N.V.

North American Philips Corporation

Signetics

Jeffrey Alma West

Edward A Burton

Alma Stephanson Anderson

Dominicus M Roozeboom

Brian C Martin

David William Oehler

Harold Garth Hanson

Robert John Marshall

The invention provides a clock sensor that can be operated at very low current and power. This sensor can also detect an input clock signal with a very small amplitude to detect the presence of clock inputs. According to one embodiment of the invention, a clock sensor comprises an input circuit configured to receive an input clock signal; a biasing circuit configured to receive the input clock signal and to provide biasing voltages; and a switching circuit configured to receive the biasing voltage and in response to the input clock signal, to provide a switching signal for switching an output circuit to generate an output clock signal. The input clock signal may have a small amplitude and the output clock signal has a full amplitude.

Low current clock sensor

The invention provides an improved high speed voltage controlled oscillator (VCO) buffer cell, with consistent output performance. According to one embodiment of the invention, the cell comprises a differential pair of transistors and a current mirror circuit. The differential pair has input terminals for receiving input signals and output terminals for providing differential voltage swing in response to the input signals. The current mirror circuit is operably coupled to the pair of transistors and is configured to receive a first external reference current and provide a mirrored current to an active one of the transistors. The differential voltage swing has a frequency which is determined based on the reference current. In a specific embodiment of the invention, the pair of transistors of the cell is bipolar transistors, and the current mirror circuit is composed of CMOS transistors.

High speed voltage controlled oscillator

The invention implements a Positive Emitter Coupled Logic (PECL) output using CMOS transistors that approximate the Motorola ECL characteristics into standard PECL termination schemes. By creating a PECL output using a switchable current source the PECL output can be integrated into a Low Voltage Differential Signaling (LVDS) structure. The invention allows the user to switch between PECL and LVDS outputs via control logic by enabling the specific circuit elements for each signaling technology. With this invention, the combination of two drivers on one IC device gives system designers the flexibility to use the same circuitry in two separate signaling schemes. Thus, the designers can select to use one output characteristics or the other for their designs.

Universal PECL/LVDS output structure

A BiCMOS power driver circuit for interfacing to a bus comprises circuitry for channelling current from a power source to the base of a bipolar device to pull the output all the way down to within a bipolar V.sub.SAT voltage drop of ground, and then uses feedback to turn-off the pull-down circuit to conserve power. A similar circuit functions to provide Incident Wave Switching and Glitch Suppression by monitoring the voltage level at the output and sinking current as necessary to maintain a low logic level.

BiCMOS output driver with reduced static power consumption

An electronic circuit comprises a programmable cell that comprises a cell input, an output, a programmable component, programming means for selectively changing a state of the component, and coupling means for providing a signal path from the cell input to the output dependent on the component's state. The programmable component, e.g., a fuse, is located outside the signal path. Capacitances that limit the speed of operation in the read mode are considerably lower than in the prior art.

Programmable cell with a programmable component outside the signal path

A bipolar input circuit for regulating the current/voltage level at the base of a switching transistor (QA) provides a capacitively-controlled discharge path from the base through a discharge transistor (QC) when an input signal (V.sub.I) makes certain voltage transitions. The base of the switching transistor responds to the voltage at an emitter (E1) of an input transistor (QB) which has another emitter (E2) coupled to the base of the discharge transistor. Its base is further coupled to a capacitor (C) which controls the discharge path.

Growing community of inventors

Albuquerque, NM, United States of America

Jeffrey Alma West