Semiconductor Components Industries, LLC

Hewlett-packard Company

Aptina Imaging Corporation

Hewlett-packard Development Company, L.p.

Micron Technology Incorporated

Jeffery S Beck

Dennis J Schloeman

Adam L Ghozeil

Michael J Barbour

Matthew Michael Borg

Daryl E Anderson

George H Corrigan

Charles Myers

Charles Frederic McCord

James A Feinn

Richard I Klaus

Christopher D Silsby

Frank J DeMonte

Jaroslav Hynecek

John M Wade

Clayton L Holstun

Roger Panicacci

Sergey Velichko

Manuel H Innocent

Ray Alan Mentzer

Glenn Thomas Haddick

William George Gazeley

Hong-Wei Lee

Pere Esterri

Barry Vanhoff

Cornelis Daniel Hoekstra

Ray Allen Mentzer

An image sensor may include an array of image pixels. The array of image pixel may be coupled to control circuitry and readout circuitry. One or more image pixels in the array may each include a photodiode and a floating diffusion region. The floating diffusion region may be coupled to a charge storage structure for a low conversion gain configuration and can be coupled to a charge storage structure for a medium conversion gain configuration. The medium conversion gain charge storage structure may be activated when transferring photodiode charge to the floating diffusion region for a high conversion gain configuration. The control circuitry may control each pixel to perform a high conversion gain readout operation, a medium conversion gain readout operation, and a low conversion gain readout operation. If desired, the medium conversion gain readout operation may be omitted.

Image sensor with multi-gain readout

An image sensor may include an array of image sensor pixels that are read out using analog-to-digital converters (ADCs). The ADC may be shot-noise-matched to reduce the number of decision cycles required. A ramp with limited resolution spanning only a small portion of the full scale voltage range may be used. For small analog input voltages, this limited ramp range is sufficient. For large analog input voltages, less resolution is needed due to the increasing shot noise in the photo signal. The larger input voltages may be successively divided by a selected attenuation factor until the analog input signal is within the range of the reduced ramp. The ADC keeps track of the number of divisions being performed to determine an exponent value for a floating-point output value and then convert the residual signal with the smaller ramp to determine a mantissa value for the floating-point output value.

Imaging system with shot-noise-matched and floating-point ramp analog-to-digital converters

An imaging system may include an image sensor having a pixel array. The pixel array may receive test signals from multiplexers located at the top or bottom of each column of the array. Test signals may be provided to each column based on a predefined test pattern. In some arrangements, pixel array photodiodes may receive test signals through an anti-blooming transistor while the anti-blooming transistor is on. In other arrangements, dark current of photodiodes in the pixel array may be modulated by voltages applied to the drain of an anti-blooming transistor while the anti-blooming transistor is off. In other arrangements, pixel array photodiodes may receive test signals through a reset transistor. Arbitrary test patterns may be applied to determine photodiode or floating diffusion node leakage and incorrect pixel control voltages. Arbitrary patterns may also be superimposed on light-based image data in the manner of a watermark.

Methods and apparatus for generating test and overlay patterns in image sensors

An image sensor may include an array of pixels arranged in rows and columns. Each pixel may include a floating diffusion node, a capacitor, a dual conversion gain (DCG) transistor having a gate terminal coupled to the floating diffusion, a source terminal, and a drain terminal coupled to the floating diffusion through the capacitor. Column readout circuitry may provide per-column control signals to the source terminal of the DCG transistor in the pixels of a selected row to place the pixels into a low conversion gain mode by turning the DCG transistor on and into a high conversion gain mode by turning the DCG transistor off. In this way, the readout circuitry may provide per-column conversion gains for each row without boosting DCG control signals to magnitudes greater than the pixel supply voltage, thereby reducing voltage stress on the pixel array and improving lifetime of the image sensor.

Imaging systems and methods for performing unboosted image sensor pixel conversion gain adjustments

Various embodiments of the present technology may comprise a method and apparatus for an image sensor. The image sensor may be configured as a stacked image sensor with two or more chips stacked vertically. The image sensor may comprise a plurality of pixel circuits, wherein portions of the pixel circuit are arranged on separate chips. Each pixel circuit may comprise an amplifier with a first feedback network to increase the sensor sensitivity, to reduce noise in the pixel signal, and to reduce the voltage swing on the FD node. Each pixel circuit may further comprise a second feedback network to stabilize the common-mode voltage of the pixel signal amplifier.

Methods and apparatus for a CMOS image sensor with an in-pixel amplifier

An imaging pixel may be operated in either a linear mode or a logarithmic mode. In the logarithmic mode, the voltage at a floating diffusion region may be proportional to the logarithm of the intensity of incident light. In order to enable correlated double sampling (CDS) in the logarithmic mode, a transistor may be provided that couples the photodiode to a bias voltage. When the transistor is turned off, the photodiode may be able to operate in a logarithmic mode. When the transistor is turned on, the floating diffusion region may be reset to a baseline voltage level. Images from the linear mode and the logarithmic mode may be combined to form high dynamic range images with flicker mitigation.

Logarithmic pixels with correlated double sampling

In order to reduce dark current and pixel readout noise in an image sensor, pixels may include a p-type hole-based pinned photodiode. Charge stored in the p-type pinned photodiode may be transferred to a p-type floating diffusion (FD) node and read out by pixel circuitry that uses p-channel metal oxide-semiconductor field-effect transistors (p-channel MOSFET). Additionally, the pixel circuitry may be split across multiple wafers that are connected by metal interconnect layers. This arrangement may enable the pixel photodiode to have a larger size than if all of the pixel circuitry was in a single wafer.

Pixel and circuit design for image sensors with hole-based photodiodes

An image sensor may have an array of pixels and readout circuitry. The array may include image pixels that generate signals in response to image light and reference pixels that generate signals in response to electrical noise. The readout circuitry may obtain first pixel values from the image pixels and may obtain second pixel values from the reference pixels. The readout circuitry may generate an extended precision pixel value based on the second pixel values that have an extended bit width relative to the each of the second pixel values. The readout circuitry may generate multiple dithered correction values by adding randomized sequences of least significant bits to the extended precision pixel value. The readout circuitry may mitigate visible quantization error and noise such as row-correlated and column-correlated noise in the final image by subtracting the dithered correction values from corresponding first pixel values.

Imaging systems and methods for mitigating pixel data quantization error

An imaging system may output embedded data in an output frame. Selected bits of pixel data words, corresponding to data read out from imaging pixels and non-imaging pixels, may be modified to correspond to bits of embedded data. Modifying pixel data words may include receiving a pixel data word and decatenating the pixel data words into fragments of the data word. A first fragment may correspond to bits of the data word that are replaced by embedded data bits output from an embedded data engine. A second fragment may be modified using arithmetic circuitry based on whether the embedded data bits that replace the first fragment are the same as bits of the first fragment. An output data word may be produced that includes embedded data bits at its least significant bits, most significant bits, or intermediate bits.

Imaging systems with embedded data transmission capabilities

An imaging system may include an array of image pixels and verification circuitry. The verification circuitry may inject test voltages into the image pixel array during the photodiode reset operation. The test signals may then be read out using a correlated double sampling operation. Verification circuitry may compare the test signals to reference data to determine whether the imaging system is functioning properly (e.g., to determine whether the array of image pixels satisfies performance criteria). If the amount of mismatch between the test signals and the reference data exceed a predetermined threshold, the imaging system may be disabled and/or a warning signal may be presented to a user of the system.

Imaging systems with pixel array verification circuitry

An imaging system may include processing circuitry, a lens, and an array of pixels including image sensor pixels and temperature sensor pixels. The image sensor pixels may generate image pixel values in response to image light received through the lens. The temperature sensor pixels may generate thermal estimate signals based on the temperature of the pixel array. The image sensor pixels and temperature sensor pixels may generate dark current. As the temperature of the pixel array increases, the image sensor pixels and temperatures sensor pixels may generate increased dark current. Temperature sensor pixels may generate more dark current than image sensor pixels. Dark current generated by the temperature sensor pixels may be used to generate dark current compensation values that may compensate for the dark current generated by the image sensor pixels.

Systems and methods for pixel-level dark current compensation in image sensors

A system may include a camera module having error generation circuitry, and processing circuitry that processes image data from the camera module. The processing circuitry may include error detection circuitry that monitors or otherwise processes the image data to verify correct operation of the camera module. To test for correct operation of the error detection circuitry, the processing circuitry may provide a control signal to the camera module that enables error generation and selects a type of fault for the error generation circuitry to emulate. In response to receiving the control signal, the error generation circuitry may emulate the fault at the camera module to produce faulty image data. The error generation circuitry may emulate the fault by modifying control signals at the camera module or modifying the digital image data stream produced by the camera module.

Imagers with error generation capabilities

An image sensor having image sensor pixels operable in multiple gain modes is provided. An image sensor pixel may include a photodiode, a charge transfer transistor, a reset transistor, a source follower (SF) transistor, a row select transistor, and a capacitor that is directly connected across the gate terminal and a selected source-drain terminal of the SF transistor. The SF transistor and the row select transistor may be selectively coupled to a power supply line and a column output line by asserting either a first control signal or a second control signal. The first control signal is asserted to place the pixel in a low conversion gain mode, whereas the second control signal is asserted to place the pixel in a high conversion gain mode. The charge transfer transistor may always be activated during the low conversion gain mode and may be selectively activated during the high conversion gain mode.

Multimode pixel readout for enhanced dynamic range

An imaging system may include an image sensor and a transparent protective layer formed within the field-of-view of the image sensor. The imaging system may include a light source that emits light in a predetermined pattern. The imaging system may include circuitry that may detect a reflected version of the predetermined pattern of light in image data captured by image sensor. In response, the imaging system may determine an obstruction is present within the field-of-view of the image sensor. The obstruction may be located on the transparent protective layer and may be within 10 centimeters of the image sensor. The light source and image sensor may be located in the interior of a vehicle and oriented to face the exterior of the vehicle. The imaging system may use the image data captured by the image sensor to perform vehicle assist functions for the vehicle.

Systems and methods for detecting obstructions within the field-of-view of an image sensor

Apparatus and a method for processing image data where row data is received corresponding to a target row of pixels and to one or more reference rows of pixels. A target row average is generated based on the target row data and a reference row average is generated for each of the one or more reference rows based on each reference row's respective row data. A row correction value is generated based on the target row average of the target row and the reference row average of the one or more reference rows. Corrected target row data is generated by applying the row correction value to the target row data.

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Corvallis, OR, United States of America

Jeffery S Beck