Hewlett-packard Development Company, L.P.

Compaq Computer Corporation, Inc.

Jeff Sprouse

David J Garcia

Robert L Jardine

Mizanur Mohammed Rahman

William F Bruckert

James S Klecka

Peter L Fu

James R Smullen

Fred C Sabernick

Russell Mark Rector

Martin J Grosz

Thomas J Kondo

Graham B Stott

A method and system of copying memory from a source processor to a target processor by duplicating memory writes. At least some of the exemplary embodiments may be a method comprising stopping execution of a user program on a target processor (the target processor coupled to a first memory), continuing to execute a duplicate copy of the user program on a source processor (the source processor coupled to a second memory and generating writes to the second memory), duplicating memory writes of the source processor and duplicating writes by input/output adapters to create a stream of duplicate memory writes, and applying the duplicated memory writes to the first memory.

Method and system of copying memory from a source processor to a target processor by duplicating memory writes

A processor interface chip and a maintenance diagnostic chip are provided coupled with two microprocessors designed to be run in tandem. The processor interface chip includes logic for interfacing between the microprocessors and a main memory, logic for pipelining multiple microprocessor requests between the microprocessors and main memory, logic for prefetching data before a microprocessor issues a read request, logic for allowing a boot to occur from code anywhere in physical memory without regard to the microprocessors' fixed memory location for boot code, and logic for intelligently limiting the flow of interrupt information over a processor bus between the microprocessors and the processor interface chip. The maintenance diagnostic chip includes logic to halt either of the microprocessors if an error is detected, and read out the state of the microprocessors and a secondary cache attached to the microprocessors, before the state of the microprocessors at the time of the fault changes to a different state which might hide evidence of the cause of the fault.

Processor interface chip for dual-microprocessor processor system

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Mountain View, CA, United States of America

Jeff Sprouse