Nvidia Corporation

Jeff Schottmiller

Shirish C Gadre

Ronny Krashinsky

Manan Patel

John Tran

Alan Kaatz

Jack H Choquette

Steven James Heinrich

Olivier Giroux

Alexander Lev Minkin

Michael Alan Fetterman

James Robertson

Omkar Paranjape

Mark Alan Gebhart

Ramesh Jandhyala

Oliver Giroux

Raghavan Madhavan

Mitchell Hayenga

A parallel processing unit comprises a plurality of processors each being coupled to a memory access hardware circuitry. Each memory access hardware circuitry is configured to receive, from the coupled processor, a memory access request specifying a coordinate of a multidimensional data structure, wherein the memory access hardware circuit is one of a plurality of memory access circuitry each coupled to a respective one of the processors; and, in response to the memory access request, translate the coordinate of the multidimensional data structure into plural memory addresses for the multidimensional data structure and using the plural memory addresses, asynchronously transfer at least a portion of the multidimensional data structure for processing by at least the coupled processor. The memory locations may be in the shared memory of the coupled processor and/or an external memory.

Method and apparatus for efficient access to multidimensional data structures and/or other large data blocks

In a streaming cache, multiple, dynamically sized tracking queues are employed. Request tracking information is distributed among the plural tracking queues to selectively enable out-of-order memory request returns. A dynamically controlled policy assigns pending requests to tracking queues, providing for example in-order memory returns in some contexts and/or for some traffic and out of order memory returns in other contexts and/or for other traffic.

Out of order memory request tracking structure and technique

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Santa Clara, CA, United States of America

Jeff Schottmiller