Sun Microsystems, Inc.

Jeff Price

Ashok Singhal

Bjorn O Liencres

Erik E Hagersten

Nalini Agarwal

David J Broniarczyk

Frederick M Cerauskis

Gerald Cheung

Kang S Lim

Snooping is implemented on a split transaction snooping bus for a computer system having one or many such buses. Circuit boards including CPU or other devices and/or distributed memory, data input/output buffers, queues including request tag queues, coherent input queues ('CIQ'), and address controller implementing address bus arbitration plug-into one or more split transaction snooping bus systems. All devices snoop on the address bus to learn whether an identified line is owned or shared, and an appropriate owned/shared signal is issued. Receipt of an ignore signal blocks CIQ loading of a transaction until the transaction is reloaded and ignore is deasserted. Ownership of a requested memory line transfers immediately at time of request. Asserted requests are queued such that state transactions on the address bus occur atomically logically without dependence upon the request. Subsequent requests for the same data are tagged to become the responsibility of the owner-requestor. A subsequent requestor's activities are not halted awaiting grant and completion of an earlier request transaction. Processor-level cache changes state upon receipt of transaction data. A single multiplexed arbitration bus carries address bus and data bus request transactions, which transactions are each two-cycles in length.

Implementing snooping on a split-transaction computer system bus

A split transaction snooping bus protocol and architecture is provided for use in a system having one or many such buses. Circuit boards including CPU or other devices and/or distributed memory, data input/output buffers, queues including request tag queues, coherent input queues ('CIQ'), and address controller implementing address bus arbitration plug-into one or more split transaction snooping bus systems. All devices snoop on the address bus to learn whether an identified line is owned or shared, and an appropriate owned/shared signal is issued. Receipt of an ignore signal blocks CIQ loading of a transaction until the transaction is reloaded and ignore is deasserted. Ownership of a requested memory line transfers immediately at time of request. Asserted requests are queued such that state transactions on the address bus occur atomically logically without dependence upon the request. Subsequent requests for the same data are tagged to become the responsibility of the owner-requestor. A subsequent requestor's activities are not halted awaiting grant and completion of an earlier request transaction. Processor-level cache changes state upon receipt of transaction data. A single multiplexed arbitration bus carries address bus and data bus request transactions, which transactions are each two-cycles in length.

Split transaction snooping bus protocol

The present invention provides an 'alert' interface for a component which can be safely 'hot-plugged/unplugged' to an 'alert' interconnect of an electrically powered system. The alert interface has a mating edge which includes daughter precharge/ground connectors, a daughter (engage) waning connector, a number of daughter signal connectors and a daughter engage connector. The alert interconnect includes corresponding mother connectors. The respective connectors of the interconnect and the interface are arranged so that they mate in the following exemplary order when the interface is hot-plugged/unplugged to the interconnect: precharge/ground connectors, warning connectors, signal connectors and finally engage connectors. When the daughter (engage) warning connector mates with the mother warning connector, the component sends an 'engage warning' signal to the powered system. Eventully, all the signal connectors mate followed by the engage connectors, enabling the component to send an 'engaged' signal to the system indicating that all the signal connectors have completely mated. In accordance with another aspect of the invention, the component can also be safely 'hot-unplugged' by first, substantially increasing the degree of recess of the daughter engage connector relative to the daughter signal connectors along the mating edge, and second, doubling the daughter engage connector to function as a daughter disengage warning connector.

Method and apparatus for hot plugging/unplugging a sub-system to an

Growing community of inventors

Mountain View, CA, United States of America

Jeff Price