Texas Instruments Corporation

National Semiconductor Corporation

Jeff Perry

Dien Mac

Pradeep Kumar Chawda

Makram Mounzer Mansour

Satyanandakishore Venkata Vanapalli

Kian Haur Chong

Ashwin Vishnu Kamath

Srikanth Pam

Albert M Bergemont

Khang Duy Nguyen

Makram Monzer Mansour

Yudhister Satija

Pavani Jella

Khanh Nhat Vo

Shrikrishna Srinivasan

Howard Chen

Nithya Narayanaswamy

Gerold J Dhanabalan

Tommy E Jewell

A method for converting a circuit in a format of a first circuit simulation program to format of a second circuit simulation program includes identifying components in the circuit that are recognized by the second simulation program. Characteristics for components that are not recognized by the second simulation program are created. Connections in the circuit are formatted to a format that is recognized by the second simulation program. The components, characteristics, and connections are stored in a single computer-readable file.

Methods for converting circuits in circuit simulation programs

A system and method for web-based interface design tool is provided. The design tool enables system designers to quickly and independently design a custom serial-link interface. The system provides interface selection and signal integrity analysis. An interface selection may interact with system designers to prompt for a set of selection criteria such as data-rate, supply rail, standard protocol, and intended application. An intelligent search engine screens through a large interface products database based on the selection criteria and provides designers with a list of devices that potentially meet the design criteria. The performance of the custom system with the selected device can be evaluated by using a web-based IBIS-AMI standard-compliant signal integrity simulator. A designers can have options to manually fine tune selected devices' parameters to iterate through different settings to determine the robustness of the solution.

System and method for high-speed serial link design

A system includes a user input engine to receive input via a graphical user interface (GUI) through a first window, the input including a distance value and an input resolution value. The system also includes a sensor circuit solution generation engine to generate a plurality of sensor circuit solutions based on the received input and to cause the plurality of sensor circuit solutions to be displayed. Each sensor circuit solution specifies information about a conductive coil.

Sensor circuit design tool

A method (and related apparatus) includes receiving user input and generating at least one of schematic content for a circuit based on the received user input and a printed circuit board (PCB) layout based on the circuit. The method further includes generating a bill of material (BOM) for the circuit, and receiving a user selection of at least one of a computer-aided design (CAD) tool format and a PCB layout tool format. The method also includes receiving a user selection to include footprints for the components used in the schematic content or PCB layout and exporting at least one of the schematic content, and PCB layout as well as the PCB footprints to one or more files in accordance with the selected CAD and/or PCB layout tool format.

Circuit design synthesis tool with export to a computer-aided design format

A trench isolation structure featuring a shallow trench overlying a deep trench is fabricated avoiding creation of irregularities on the deep trench sidewalls. Such sidewall irregularities are conventionally associated with interaction between etchant and unexposed positive photoresist formed at the bottom of the deep trench during prior shallow trench photolithography steps. In one embodiment of the present invention, a deep trench is created and then a positive photoresist mask is patterned. The positive photoresist mask is utilized to etch a barrier selective to underlying single crystal silicon in anticipated shallow trench regions. Once the barrier has been removed, the positive photoresist mask is stripped, removing any unexposed positive photoresist remaining within the deep trench. Single crystal silicon revealed by removal of the barrier is etched to create the shallow trench, with remaining barrier material sacrificed to protect the underlying surface against this etching. In an alternative embodiment, a negative photoresist mask is employed during shallow trench photolithography, with development of the negative photoresist effective to remove the photoresist from the deep trench.

Process for fabricating trench isolation structure for integrated

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Cupertino, CA, United States of America

Jeff Perry