Tower Semiconductor Ltd.

Jeff Levy

Zmira Lavie

Itzhak Edrei

Coren Ben-Guigui

Aviad Roth

A batch process for the high-pressure forming of metal plugs in the dielectric layers of semiconductor wafers. After holes are etched in the dielectric layer of each wafer, and a layer of a metal such as aluminum deposited over the dielectric, both the etching and the deposition being done in vacuum chamber cluster machines, the wafers are removed from the cluster machines and placed together in a high pressure chamber where they are subjected to high isostatic pressure that forces the metal into the holes.

Batch process for forming metal plugs in a dielectric layer of a semiconductor wafer

An improved method for depositing a flow fill layer of an integrated circuit. Two flowlayers and two cap layers are deposited. The wafer is warmed between the deposition of the first cap layer and the deposition of the second flowlayer, to evaporate water from the first flowlayer. Preferably, each of the cap layers is deposited in two separate steps of plasma enhanced chemical vapor deposition, to inhibit crack formation in the flowlayers. Most preferably, after the depositions of each flowlayer, the flowlayer is planarized by flowing H.sub.2 O.sub.2 thereupon.

Method for depositing a flow fill layer on an integrated circuit wafer

Batch process for forming metal plugs in a dielectric layer of a

An improved method for depositing the cap layer of a flow fill layer of an integrated circuit. The cap layer is deposited in at least two steps, instead of all at once.

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Moshav Netofah, Israel

Jeff Levy