Freescale Semiconductor,inc.

Nxp Usa, Inc.

Jeff L Warner

Anis Mahmoud Jarrar

David Russell Tipple

Juxiang Ren

Bernard J Pappert

Robert Scott Ruth

Mark A Kearney

An integrated circuit includes a first transistor including a first current electrode, a second current electrode, and a bulk tie; a first conductive line coupled between the first current electrode and a first supply voltage; and a second conductive line coupled to the second current electrode. A resistance of the second conductive line is at least 5 percent greater than a resistance of the first conductive line. The bulk tie is coupled to a second supply voltage. The first supply voltage is different than the second supply voltage.

Integrated circuit with power saving feature

A semiconductor device includes CMP dummy tiles () that are converted to active tiles by forming well regions () at a top surface of the dummy tiles, forming silicide () on top of the well regions, and forming a metal interconnect structure () in contact with the silicided well tie regions for electrically connecting the dummy tiles to a predetermined supply voltage to provide latch-up protection.

Active tiling placement for improved latch-up immunity

Growing community of inventors

Austin, TX, United States of America

Jeff L Warner