Chartered Semiconductor Manufacturing Ltd (Corporation)

Jeff Jianhui Ye

Mei Sheng Zhou

Huang Liu

Liang Choo Hsia

Wei Lu

Hai Cong

Alex K H See

Hui Peng Koh

A method for forming silicide contacts in integrated circuits (ICs) is described. A spacer pull-back etch is performed during the salicidation process to reduce the stress between the spacer and source/drain silicide contact at the spacer undercut. This prevents the propagation of surface defects into the substrate, thereby minimizing the occurrence of silicide pipe defects. The spacer pull-back etch can be performed after a first annealing step to form the silicide contacts.

Method for reducing silicide defects in integrated circuits

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Bristow, VA, United States of America

Jeff Jianhui Ye