Intel Corporation

Jeff DelChiaro

Tony Lee Werner

Nitin N Garegrat

Michael Rotzin

Anne Q Ye

Robert T Rhoades

Ujwal Basavaraj Sajjanar

In one embodiment, a matrix processor comprises a memory to store a matrix operand and a strided read sequence, wherein: the matrix operand is stored out of order in the memory; and the strided read sequence comprises a sequence of read operations to read the matrix operand in a correct order from the memory. The matrix processor further comprises circuitry to: receive a first instruction to be executed by the matrix processor, wherein the first instruction is to instruct the matrix processor to perform a first operation on the matrix operand; read the matrix operand from the memory based on the strided read sequence; and execute the first instruction by performing the first operation on the matrix operand.

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Scotts Valley, CA, United States of America

Jeff DelChiaro