Netapp, Inc.

Network Appliance, Inc.

Keyssa Systems, Inc.

Jeff Cuppett

Rahim Ibrahim

Reynold Leong

Roger Dwain Isaac

Alan T Ruberg

Edward T Pak

James Cihla

A universal protocol engine circuit aggregates data of multiple communication ports that may use different communication protocols according to a configurable communication protocol. In a transmitter mode, the universal protocol engine circuit references a slot table defining a sequence of the ports to generate output data from the input data received from the ports, and transmits the output data over a wired or wireless communication link. In a receiver mode, the universal protocol engine circuit references the slot table to parse input data from the communication link into output data for each of the ports. The sequence of ports of the slot table may be configurable according to the speed or other properties of the communication ports.

Virtual pipe for connecting devices

A storage server includes various components that monitor and control the data flow therebetween. If an egress (downstream) port becomes congested, that information is propagated upstream to the egress components such as the port manager, the traffic manager processor, and the egress storage processor, which are each configured to control their data flow to prevent dropped data frames. In addition, the egress storage processor can communicate the congestion information to the ingress storage processor, which further propagates the congestion information to the ingress components such as the traffic manager processor and the port manager processor. The ingress port manager processor can then direct the ingress port to stop accepting ingress data for the storage server to process until the congestion has been addressed.

Apparatus to flow control frames in a networked storage virtualization using multiple streaming protocols

One or more circuits that validate data frames are provided. The validation may validate information for a fiber channel header and information for a small computer system interface (SCSI) header. The validation is performed by one or more circuits at wire speed.

Apparatus for processing fibre channel and SCSI frames at wire speed

Techniques for searching a data structure using information in entries found in the data structure are provided. A key is determined for an entry in a data structure and an entry for that key is accessed. It is determined if that entry is the correct entry for the key. If not, information in the entry is used to determine a second entry for the key. It is then determined if the second entry is the correct entry for the key. If not, the process continues as described above until the correct entry is found.

Growing community of inventors

Los Altos, CA, United States of America

Jeff Cuppett