Eni - a Division of Astec America, Inc.

Eni Technologies Inc.

Eni Div. of Astec America, Inc.

Jeff C Sellers

Vadim Lubomirsky

Pulses of a positive voltage are superimposed onto negative dc sputtering current that is applied to the target of a dc sputtering process to create a reverse bias. This charges insulating deposits on the target to the reverse bias level, so that when negative sputtering voltage is reapplied to the target, the deposits will be preferentially sputtered away. The reverse bias pulses are provided at a low duty cycle, i.e., with a pulse width of 0.25 to 3 microseconds at a pulse rage of 40 to 200 KHz. This technique reduces or eliminates the sources for arcing. A circuit arrangement for reverse biasing provides the forward (negative) dc sputtering power as a current source, and provides the pulses of reverse (positive) voltage as a voltage source.

Preferential sputtering of insulators from conductive targets

An asymmetric bipolar plasma etching process is employed for etching a workpiece positioned within a plasma chamber, to prepare the workpiece for a subsequent coating process. The etching process involves applying a negative high voltage to the workpiece, relative to an anode portion of the chamber. Pulses of a positive voltage are applied to the workpiece at a predetermined pulse width and a predetermined level relative to the anode, so that the applied voltage appears as a train of asymmetric bipolar pulses. The waveform has a major negative-going portion and a minor positive-going portion. The negative-going portion can have a voltage of minus 300 to minus 4,000 volts, and the positive-going pulses can have a voltage of plus 50 to plus 300 volts, and a typical pulse width between about 0.25 and 3 microseconds. The etching process can be followed by a sputter coating process in the same chamber. Another coating technique could also be used.

Etch process employing asymmetric bipolar pulsed DC

A protective circuit for a power field effect transistor, e.g., a power MOSFET, employs a diode-switched pickup circuit, a threshold detector, and a timer. The pickup circuit includes a resistor and diode in series, with the diode connected with the MOSFET drain electrode and the resistor connected with the gate driver for the MOSFET gate electrode. A pickup voltage V.sub.1 appears at the junction of the diode and resistor. When the MOSFET is conducting the pickup voltage is the sum of the channel voltage V.sub.ds-on and the diode forward voltage V.sub.f. When the MOSFET is biased OFF, the pickup voltage is zero. The threshold detector compares the pickup voltage with a reference voltage that is offset some predetermined amount from the source electrode voltage. When threshold circuit goes high, the timer circuit provides a time-out or inhibit signal to an inhibit input of the gate driver circuit. Under high load current or high temperature conditions, the drain-source voltage V.sub.ds-on rises, and if the threshold is exceeded, the gate signal is cut off. This holds the transistor OFF for the timer period. This arrangement uses the MOSFET channel resistance R.sub.ds as the current sense resistor. The protective circuit can be integrated, and can be combined with the MOSFET in a single package.

Intrinsic element sensing integrated SOA protection for power MOSFET

A strike enhancement circuit for a dc power supply, which can be a switched half-bridge supply, creates a high voltage at high impedance to initiate a plasma in a plasma chamber or sputtering chamber. The strike circuit has a plurality of diode bridges that act as full-wave rectifiers or peak detectors. The transformer secondary of the power supply is connected through isolation capacitors to the ac inputs of each of the diode bridges. The dc ports of the diode bridges are stacked in series, and the combined, stacked voltage is applied across the input terminals of the plasma chamber. Each diode bridge also has a storage capacitor connected between the positive and negative dc ports. Positive and negative voltage peaks from the transformer secondary waveform are stored in the storage capacitors. The combined dc outputs applied to the plasma chamber appear as a voltage high enough to initiate a plasma discharge. Once the plasma is present, the impedance of the isolation capacitors prevents the strike circuit from providing the high strike voltage.

Strike enhancement circuit for a plasma generator

Pulses of positive voltage are applied to the target of a dc sputtering process to create a reverse bias. This charges insulating deposits on the target to the reverse bias level, so that when negative sputtering voltage is reapplied to the target, the deposits will be preferentially sputtered away. The reverse bias pulses are provided at a low duty cycle, i.e., with a pulse width of 0.25-3 microseconds at a pulse rate of about 40-100 KHz. This technique reduces sources for arcing during a reactive sputtering process.

A soft start circuit for a high-power module permits trickle-charging of the capacitor bank prior to power switch actuation, and avoids large current surges or inrush at power up. Positive temperature coefficient thermistor devices, or PTCs are place in shunt across the switch elements or poles of the actuator or other power switch. In a power module that is powered by three-phase AC, the three power conductors are coupled through a three-pole contactor to AC inputs of a polyphase rectifier bridge, which has DC outputs coupled to the capacitor bank and to a load device, such as a high-power RF amplifier. The PTCs are connected, one per pole, in shunt across each pole of the contactor. Alternatively, metallized film capacitors can be employed in lieu of the PTCs.

Low cost, high reliability soft start arrangement

A dc sputtering process applies a pulsating dc voltage in which each cycle includes a pulse portion of negative dc voltage of -300 to -700 volts alternating with a reverse bias (positive) pulse of about +50 to +300 volts. The reverse bias pulse portion will reduce or eliminate sources for arcing in most cases. To combat sticky or persistent arcing, the negative pulse portion is monitored. If, during a window portion of the negative pulse portion, the applied voltage drops into a range characteristic of arcing for two successive cycles, then the applied power is interrupted for a period, e.g., 200 microseconds, and reverse bias is applied. An overvoltage detection and clamping circuit monitors the applied voltage for extreme voltage excursions, and if an overvoltage threshold is exceeded for two successive cycles, the applied power is interrupted. The overvoltage detection and clamping circuit can comprise a string of zener diodes or equivalent voltage limiting devices connected to the applied voltage. This circuit absorbs the voltage excursions beyond the threshold and protects the power supply and the substrate in the plasma chamber.

Arc control and switching element protection for pulsed dc cathode

A dc-dc converter employs both half-bridge topology and current-mode switching control. The controller operates by sensing the current that flows through the transformer that is interposed between the node of two series switches and the node between the two split capacitors. The controller develops gating signals to close and open the switches based on the rise of current to a predetermined command level. A gate signal for the second switch, which is developed between actuations of the first switch, has its pulse width made equal to the period that the first switch was closed. This maintains a balanced voltage-time product, so that the series or split capacitors remain in balance. The controller can include a sample gating circuit with a comparator that receives the current sample signal and the command level. The track side signal which develops the gating pulse for the other switch can be developed with analog circuitry, i.e. by charging a capacitor, or else digitally, i.e. by clock pulse counting.

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Palmyra, NY, United States of America

Jeff C Sellers