Skhynix Inc.

Hynix Semiconductor Inc.

Jee Yul Kim

Jung Ae Kim

Sung Jin Park

Hyeong Ju Na

Tae Ha Kim

Yoon Jae Shin

Dong Hyun Cho

Yeong Dong Gim

Ji Kyung Jeong

Kwan Su Lee

A controller controls a semiconductor memory device including a plurality of pages. The controller includes a command generator configured to generate a command for controlling a program operation or a read operation of a semiconductor memory device, and a data recovery manager configured to generate parity data corresponding to a weak page among a plurality of pages included in the semiconductor memory device and recover data programmed to the weak page.

Controller and method of operating the same

A storage device performs a read operation, based on a temperature measured in a program operation or an erase operation. The storage device includes: a memory device including a plurality of memory blocks, the memory device measuring a temperature in a program operation or an erase operation; and a memory controller for setting an area in which the measured temperature is to be stored in the memory device, and controlling a read operation to be performed in the memory device. When a read command for a selected page among a plurality of pages included in each of the plurality of memory blocks is received from the memory controller, the memory device determines a read voltage and a pass voltage based on a temperature corresponding to the selected page and performs a read operation on the selected page by using the read voltage and the pass voltage.

Storage device and operating method thereof

The present disclosure relates to a storage device. The storage device includes a memory device including write-completed blocks storing data and free blocks each containing no data and a memory controller controlling the memory device to perform a garbage collection operation to store valid data stored in a victim block, among the write-completed blocks, in one of the free blocks based on the number of map segments including mapping information between logical addresses and physical addresses of the valid data, and erase counts of the free blocks.

A memory system includes a memory device including plural memory groups, each memory group including plural non-volatile memory cells; and a controller configured to transmit a command to the memory device so that the memory device performs a data input/output operation within at least one memory group among the plural memory groups, receive a response for the command and a status data regarding the at least one memory group from the memory device, and determine whether the data input/output operation has succeeded or failed based on the response and the status data.

Apparatus and method for checking an error of a non-volatile memory device in a memory system

A memory device is provided to include: a plurality of memory cells; a peripheral circuit configured to perform an operation on the plurality of memory cells; a temperature circuit configured to measure a temperature of the memory device; a monitoring component configured to generate, based on whether a measured temperature is within a reference range, monitoring information representing an operation mode that is either a normal mode in which the operation is performed or a protection mode in which the operation is suspended; and an operation controller configured to output a signal for controlling the operation according to the monitoring information. The monitoring component is further configured to store the monitoring information and output the monitoring information to the operation controller in response to receiving the measured temperature from the temperature circuit.

Memory system and operating method thereof

A nonvolatile memory device may include: a memory cell array operated by a first voltage, and including a plurality of memory cells; a peripheral circuit operated by the first voltage, and configured to store data in the memory cell array or read data from the memory cell array; an operation recorder operated by a second voltage, and configured to record information on an operation being performed in the nonvolatile memory device; and a control logic operated by the first voltage, and configured to control the peripheral circuit such that the nonvolatile memory device performs an operation corresponding to a command received from an external device, and control the operation recorder to store the information on the operation being performed in the nonvolatile memory device.

Nonvolatile memory device, data storage device including the same and operating method thereof

Embodiments of the present disclosure relate to a memory system and an operating method thereof. According to the embodiments of the present disclosure, the memory system may completely scan each of one or more target memory blocks among the plurality of memory blocks, once in each scan period to detect an error in data stored in the corresponding target memory block and may block an attempted second scan of each target memory block in a scan period in which the corresponding target memory block has already been scanned until the scan period is completed.

A storage device may include: a memory device including a plurality of memory blocks; a buffer memory device to store event information; and a memory controller configured to: upon occurrence of the predetermined event while a write operation, store, in the buffer memory device, the event information for the event page, and control the memory device to perform a test read operation to read at least one page in the plurality of memory blocks except the event page, based on the event information; upon failure of the test read operation, control the memory device to perform a migration operation of moving, to a replacement block, data stored in valid pages except a page on which the test read operation has fails among pages included in a memory block on which the test read operation fails.

The present disclosure relates to a storage device and an operating method thereof. The storage device includes a memory device including write-completed blocks storing data and free blocks each containing no data and a memory controller controlling the memory device to perform a garbage collection operation to store valid data stored in a victim block, among the write-completed blocks, in one of the free blocks based on the number of map segments including mapping information between logical addresses and physical addresses of the valid data, and erase counts of the free blocks.

A data storage device may include a nonvolatile memory device, and a controller configured to increase an assert count, when a malfunction occurs while an operation for a command received from a host device is executed, the assert count representing the number of times the malfunction has occurred, and execute a flash translation layer (FTL) resetting operation in a read-dedicated mode in response to an initialization request from the host device when the assert count is greater than or equal to a reference value.

Data storage device and operating method thereof

A nonvolatile memory device includes a memory cell array; a peripheral circuit configured to perform an operation corresponding to a command provided from an external device, for the memory cell array; a fail occurrence register configured to store fail occurrence information for intentionally causing an operation fail to occur; and a control logic configured to store the fail occurrence information in the fail occurrence register based on a fail occurrence command received from the external device, control the peripheral circuit to perform a test operation corresponding to a test operation command received from the external device, for the memory cell array, and control the peripheral circuit to cause an intentional fail to occur in the test operation, based on the fail occurrence information.

Nonvolatile memory device, operating method thereof and data storage device including the same

A data storage device includes a nonvolatile memory device including an address map table in which a plurality of map segments including a plurality of logical-to-physical (P2L) entries are stored and a controller controlling the nonvolatile memory device. The controller includes a processor and a memory storing a map update module configured to be driven through the processor and perform map updating on the plurality of map segments. The map update module divides each of the map segments into a plurality of sub segments, updates a first sub segment as an updating target among the plurality of sub segments by loading the first sub segment into a map update buffer of the memory, and encodes second sub segments as a non-updating target among the plurality of sub segments and stores the encoded second sub segments in a page buffer of the nonvolatile memory device.

A data storage device includes a first memory device including an operation information region for an original operation information, and suitable for performing a first initialization operation based on the original operation information and a controller suitable for performing a management operation to the original operation information, wherein the original operation information of the operation information region is prohibited from being changed until completion of the management operation.

Data storage device

A memory system, a semiconductor memory device and methods of operating the same may perform a read operation on the basis of flag data stored in a flag register, without reading the flag data stored in a memory array, when performing the read operation, so that a time taken for the read operation may be reduced.

Growing community of inventors

Gyeonggi-do, South Korea

Jee Yul Kim