Samsung Electronics Co., Ltd.

Jee-Eun Jung

Kyoung-Yun Baek

Je-Min Park

Seong-woon Choi

Jeong-Hoon Lee

Ho-Jin Oh

A method of manufacturing a semiconductor device includes generating a mask layout of patterns in which the distance between adjacent ones of the patterns is equal to or less than a resolution of a lithography process, the patterns are apportioned among a plurality of masks such that in each of the masks the space between adjacent ones of the patterns is greater than the resolution, and a dual pattern is added to one of the masks. A semiconductor pattern is formed on a substrate using the mask(s) and the mask to which the dual pattern has been added. Patterns having a pitch equal to or less than the resolution may be formed on the semiconductor device.

Method of manufacturing semiconductor device

A method of fabricating a semiconductor device includes preparing a layout of the semiconductor device, obtaining contrast of an exposure image of the layout through a simulation under a condition of using a crosspole illumination system, separating the layout into a plurality of sub-layouts based on the contrast of the exposure image, forming a photomask having a mask pattern corresponding to the plurality of sub-layouts, and performing an exposure process using the photomask under an exposure condition of using a dipole illumination system.

Method of fabricating semiconductor device

An embodiment of a photomask for forming gate lines and a method of manufacturing semiconductor devices using the photomask is disclosed. The photomask includes a photomask substrate, gate line mask patterns that define gate lines that cross at least one active region on a semiconductor substrate, and that are arranged in parallel, gate tab mask patterns formed on both sides of each gate line mask pattern, and joints formed between adjacent gate tab mask patterns, and that include a separation region. A relatively large gate tab mask pattern can be formed using the photomask. And a short channel effect at the boundary of the active region can be improved with the large gate tab mask pattern, so the characteristics and reliability of the semiconductor devices can be improved.

Growing community of inventors

Yongin-si, South Korea

Jee-Eun Jung