International Business Machines Corporation

Inetrnational Business Machines Corporation

Jeanne Paulette Spence Bickford

Nazmul Habib

Jason D Hibbeler

Juergen Koehl

John Robert Goss

Robert J McMahon

William John Livingstone

Daniel Nelson Maynard

Susan K Lichtensteiger

Raymond J Rosner

Thomas S Barnett

Daniel Nelson Mayuard

A method, apparatus, system, and computer program product that performs yield estimates using critical area analysis on integrated circuits having redundant and non-redundant elements. The non-redundant elements are ignored or removed from the critical area analysis performed for undesired opens.

Apparatus and computer program product for semiconductor yield estimation

An apparatus, method, and program product are provided to predict yield loss associated with performance screens or leakage screens. A leakage model is correlated to an on-chip measurement. Current limited yields are determined from the leakage model. A database is formed relating performance sigma cut-points to the circuit limited yields. A product is quoted based on the circuit limited yield for one of the performance sigma cut-points taken from the database. The quote is tied to the product design and testing.

Methods, apparatus, and program products to optimize semiconductor product yield prediction for performance and leakage screens

A method of accepting semiconductor chips is provided using on-chip parametric measurements. An on-chip parametric measurement structure is determined for each parameter in a set of parametric acceptance criteria. An on-chip parametric measurement macro is included in a design of each semiconductor chip for each identified on-chip parametric measurement structure. Each on-chip parametric measurement macro is tested to determine compliance of the semiconductor chip to the set of parametric acceptance criteria. Compliance to the set of parametric acceptance criteria is validated.

Method of acceptance for semiconductor devices

A method, apparatus, and computer program product that performs yield estimates using critical area analysis on integrated circuits having redundant and non-redundant elements. The non-redundant elements are ignored or removed from the critical area analysis performed for undesired opens.

Semiconductor yield estimation

A parametric-based design methodology interlocks the design of library elements used in a semiconductor product design with the testing protocol used for the resulting semiconductor products such that parametric assumptions made regarding library elements used in a semiconductor product design may be used to disposition products such as semiconductor chips incorporating a semiconductor product design. In particular, a parametric measurement element is incorporated into a product design along with one or more library elements, with the parametric measurement element used to test one or more parametric design points that are associated with the library elements when the product design is used in a manufactured product.

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Essex Junction, VT, United States of America

Jeanne Paulette Spence Bickford