Taiwan Semiconductor Manufacturing Comp. Ltd.

Jean Wang

Chen-Hua Douglas Yu

Henry Lo

Francis Ko

Yi-Li Hsiao

Chih-Wei Lai

Jui-Pin Hung

Weng-Jin Wu

Kewei Zuo

Lawrance Sheu

Wen-Chih Chiou

Chun-Hsien Lin

Amy Wang

Ping-Hsu Chen

Ming-Che Ho

Ching-Ya Wang

Chi-Chun Hsieh

Joshua Tseng

Chien Ling Hwang

Jyh-Cherng Sheu

Chien-Ling Hwang

Ming-Shih Yeh

Yu-Liang Lin

Po-Zen Chen

Tzu-Yu Wang

Fu-Kang Tien

Chia-Ming Yang

Simon Wang

Lawrence Chiang Sheu

Ying-Lin Chen

Jia-Ren Chen

Chi-An Kao

Jerry Hwang

Chien-Ming Sung

Chun-Hsien Lim

A semiconductor manufacturing line includes an inert environment selected from the group consisting essentially of an inert airtight wafer holder, an inert wafer transport channel, an inert production tool, an inert clean room, and combinations thereof.

Preventing contamination in integrated circuit manufacturing lines

The present disclosure provides a bonding apparatus. The bonding apparatus includes a cleaning module designed for cleaning chips; and a chip-to-wafer bonding chamber configured to receive the chips from the cleaning module and designed for bonding the chips to a wafer.

Chip on wafer bonder

A first embodiment is a method for semiconductor process control comprising clustering processing tools of a processing stage into a tool cluster based on processing data and forming a prediction model for processing a semiconductor wafer based on the tool cluster. A second embodiment is a method for semiconductor process control comprising providing cluster routes between first stage tool clusters and second stage tool clusters, assigning a comparative optimization ranking to each cluster route, and scheduling processing of wafers. The comparative optimization ranking identifies comparatively which cluster routes provide for high wafer processing uniformity. Further, wafers that require high wafer processing uniformity are scheduled to be processed along one cluster route that has a high comparative optimization ranking that identifies the one cluster route to have a highest wafer processing uniformity, and wafers that do not require high wafer processing uniformity are scheduled to be processed along another cluster route.

Clustering for prediction models in process control and for optimal dispatching

A semiconductor manufacturing system, an interface system, a carrier, and a method for providing an ambient controlled environment is disclosed. The semiconductor manufacturing system comprises a plurality of process chambers; at least one interface system, wherein the interface system includes a first ambient control element; at least one carrier, wherein the carrier comprises a second ambient control element; and a control module coupled to the plurality of process chambers, the at least one interface system, and the at least one carrier.

Wafer's ambiance control

A PVD target structure for use in physical vapor deposition. The PVD target structure includes a consumable slab of source material and one or more detectors for indicating when the slab of source material is approaching or has been reduced to a given quantity representing a service lifetime endpoint of the target structure.

PVD target with end of service life detection capability

A method to enable wafer result prediction includes collecting manufacturing data from various semiconductor manufacturing tools and metrology tools; choosing key parameters using an autokey method based on the manufacturing data; building a virtual metrology based on the key parameters; and predicting wafer results using the virtual metrology.

Automatic virtual metrology for semiconductor wafer result prediction

Embodiments of the present invention relate to a method for a near non-adaptive virtual metrology for wafer processing control. In accordance with an embodiment of the present invention, a method for processing control comprises diagnosing a chamber of a processing tool that processes a wafer to identify a key chamber parameter, and controlling the chamber based on the key chamber parameter if the key chamber parameter can be controlled, or compensating a prediction model by changing to a secondary prediction model if the key chamber parameter cannot be sufficiently controlled.

Near non-adaptive virtual metrology and chamber control

A system and method for controlling resistivity uniformity in a Copper trench structure by controlling the CMP process is provided. A preferred embodiment comprises a system and a method in which a plurality of CMP process recipes may be created comprising at least a slurry arm position. A set of metrological data for at least one layer of the semiconductor substrate may be estimated, and an optimum CMP process recipe may be selected based on the set of metrological data. The optimum CMP process recipe may be implemented on the semiconductor substrate.

Method and system for controlling copper chemical mechanical polish uniformity

A method for forming a tube-based detector for signaling when a PVD target is reduced to a predetermined quantity of the PVD target material includes providing a mold member having an inner molding member and an outer molding member defining a space therebetween, melting a desired tube material, injecting the molten tube material into the space between the inner molding member and the outer molding member, cooling the molten tube material, removing the tube from the mold member after the molten tube material has cooled and solidified into a tube, embedding the tube in the physical vapor deposition target, wherein the tube forms an enclosure of the tube-based detector.

A method for manufacturing integrated circuits on a wafer includes providing a facility-supplied room temperature solution; controlling the temperature of the facility-supplied room temperature solution to a desired temperature set point to generate a rinse solution; and rinsing a polishing pad using the rinse solution. The wafer is then polished by means of a chemical mechanical polishing process.

CMP by controlling polish temperature

A method to enable wafer result prediction from a batch processing tool, includes collecting manufacturing data from a batch of wafers processed in batch in the batch processing tool, to form a batch processing result; defining a degree of freedom of the batch processing result based on the manufacturing data; and performing an optimal curve fitting by trial and error for an optimal function model of the batch processing result based on the batch processing result.

Methodology to enable wafer result prediction of semiconductor wafer batch processing equipment

A chemical mechanical polishing (CMP) device for processing a wafer is provided which includes a plate for supporting the wafer to be processed in a face-up orientation, a polishing head opposing the plate, wherein the polishing head includes a rotatable polishing pad operable to contact the wafer while the polishing pad is rotating, and a slurry coating system providing a slurry to the polishing pad for polishing the wafer.

Polishing apparatus

An apparatus includes an enclosure and a door configured to seal the enclosure. The door includes a plate. A rotational apparatus is disposed over the plate. At least one first member with a first arm extends from a first rib of the first member. At least one second member with a second arm extends from a second rib of the second member. The first and second arms are connected to the rotational apparatus. At least one corner member has a first edge. The first edge has a shape corresponding to a shape of a corner of the frame. The corner member is connected to a first end of the third arm. A second end of the third arm is connected to the rotational apparatus. A sealing material is disposed along a first longitudinal side of the first rib and a second longitudinal side of the second rib.

Apparatus for storing substrates

An adjustable anode assembly for a wet processing apparatus to allow selective tuning of the electrical field density distribution within a wet process chemical of the apparatus, which in turn allows the process specification or specifications to be selectively varied across the process surface of a wafer when processed by the apparatus. The adjustable anode assembly includes an anode which may be divided into several plates, at least one of which is capable of being moved from a first plane to at least a second plane.

Growing community of inventors

Hsin-Chu, Taiwan

Jean Wang