Cirrus Logic Inc.

Cirrus Logic International Semiconductor Limited

Jean Pierre Lasseuguette

Axel Thomsen

John Laurence Pennock

Aleksey Sergeyevich Khenkin

James Thomas Deas

Mark Hesketh

Santosh Astgimath

The disclosure provides a system, comprising: a MEMS capacitive transducer, comprising one or more first capacitive plates coupled to a first node and one or more second capacitive plates coupled to a second node; biasing circuitry coupled to the first node, operable to provide a biasing voltage to the one or more first capacitive plates; and test circuitry coupled to the second node, operable to: selectively apply one or more current sources to the second node, so as to charge and discharge the MEMS capacitive transducer and so vary a signal based on a voltage at said second node between an upper value and a lower value; determine a parameter that is indicative of a time period of the variation of the signal; and determine a capacitance of the MEMS capacitive transducer based on the parameter that is indicative of the time period.

MEMS transducer system and associated methods

This application relates to an integrated circuit die () comprising a MEMS transducer structure () integrated with associated electronic circuitry (). The electronic circuitry comprises a plurality of transistors and associated interconnections and is formed in a first area () of the die from a first plurality () of layers, e.g. formed by CMOS metal () and dielectric () layers and possibly doped areas () of substrate (). The MEMS transducer structure is formed in a second area () of the die and is formed, at least partly, from a second plurality () of layers which are separate to the first plurality of layers. At least one filter circuit () is formed from said second plurality of layers overlying the plurality of transistors of the electronic circuitry (). The second plurality of layers comprise at least a first metal layer () which is patterned to form a first electrode of the MEMS transducer and at least a resistor, capacitor electrode or inductor element () of the filter circuit.

Integrated MEMS transducer and circuitry

Circuitry for biasing a MEMS transducer and associated signal processing circuitry. A reference voltage generator is configured to generate a reference voltage at a reference voltage node. Control circuitry generates a drive signal to control a first current source which is operable to supply a current to the reference voltage generator in response to the drive signal. A switched DC-DC converter, such as a charge pump has a voltage input connected to the reference voltage node and a voltage output for providing a bias voltage for the MEMS transducer. The DC-DC converter cyclically switches in a sequence of states including at least a first state where a first converter capacitance is disconnected from the voltage input followed by a second state where the first converter capacitance is connected to the voltage input. A second current source is operable to supply a bias current in response to a voltage at a bias control node. Switch control circuitry is configured to cyclically open and close a switch connected between the drive node and the bias control node, such that the switch is open during a time window that includes the time at which the switched DC-DC converter switches from the first state to the second state.

Biasing circuitry for MEMS transducers

Amplifier arrangements for read-out of MEMS capacitive transducers, such as low-noise amplifiers. An amplifier circuit has first and second MOS transistors, with the gate of the first transistor driven by the input signal, and the gate of the second transistor driven by a reference. The sources of the first and second transistors are connected via an impedance. Modulation circuitry is arranged to monitor a signal with a value that varies with the input signal and to modulate the back-bias voltage between the bulk and source terminals of the first and second transistors with the applied modulation being equal for each transistor and based on said monitored signal. The back-bias of the first transistor can be increase to extend the input range of the transistor in situations where the input signal may otherwise result in signal clipping, while avoiding noise and power issues for other input signal levels. By applying an equal modulation to the back-bias of each transistor, there is no substantial modulation of the output signal.

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Edinburgh, United Kingdom

Jean Pierre Lasseuguette