Stmicroelectronics S.a.

Stmicroelectronics (alps) Sas

Stmicroelectronics International N.v.

Sgs-thomson Microelectronics S.a.

Stmicroelectronics Pvt. Ltd.

Jean-Pierre Blanc

Pascal Chevalier

Alain Chantre

David Duperray

Didier Celi

Pratap Narayan Singh

Michel Barou

Severin Trochut

Stéphane Le Tual

Stephane Le Tual

A sampling circuit includes a metal oxide semiconductor (MOS) transistor that includes a third metallization receiving a reference voltage between a first metallization coupled to a source region of the transistor and a second metallization coupled to a drain region of the transistor.

Sampling circuit

An acquisition stage receives a digital input signal and generates therefrom a first digital signal and a second digital signal complementary thereto. First and second processing stages receive the first and second digital signals and generate therefrom first and second analog signals in time with first and second complementary clock signals. An output stage generates an internal clock signal equivalent to one of: the first clock signal phase shifted by a duration of a transient occurring during a period of the first clock signal, or the second clock signal phase shifted by a duration of a transient occurring during a period of the second clock signal. The output stage produces an analog output signal equal to the first analog signal when the internal clock signal is at a first logic level, and equal to the second analog signal when the internal clock signal is at a second logic level.

Electronic device forming a digital-to-analog converter and a mixer

A voltage or current generator has a configurable temperature coefficient and includes a first voltage generator that generates a first voltage having a first negative temperature coefficient. A second voltage generator generates a second voltage having a second negative temperature coefficient different to the first negative temperature coefficient. A circuit generates an output level based on the difference between the first voltage scaled by a first scale factor and the second voltage scaled by a second scale factor.

Voltage/current generator having a configurable temperature coefficient

The present disclosure is directed to a method that includes exposing a surface of a silicon substrate in a first region between first and second isolation trenches, etching the silicon substrate in the first region to form a recess between the first and second isolation trenches, and forming a base of a heterojunction bipolar transistor by selective epitaxial growth of a film comprising SiGe in the recess.

Heterojunction bipolar transistor

A reference voltage generation circuit, including a first current source in series with a first bipolar transistor; a second current source in series with a first resistor; a third current source in series with a second bipolar transistor, the third current source being assembled as a current mirror with the first current source; a second resistor between the base of the second bipolar transistor and the junction point between the current source and the first resistor; and a fourth current source in series with a third resistor, the junction point between the fourth current source and the third resistor defining a reference voltage terminal.

Reference voltage generation circuit

The present disclosure is directed to a method that includes exposing a surface of a silicon substrate in a first region between first and second isolation trenches, etching the silicon substrate in the first region to form a recess between the first and second isolation trenches, =; and forming a base of a heterojunction bipolar transistor by selective epitaxial growth of a film comprising SiGe in the recess.

A low-pass filter, including: between a first terminal and a second terminal, a series association of a first resistor, of a second resistor, and of a first amplifier; in parallel with the second resistor, a series association of a second amplifier and of a first capacitor; a second capacitor between an input of the first amplifier and a third terminal of application of a reference voltage; and a third capacitor between the second terminal and the third terminal.

Second-order low-pass filter

A low-pass filter includes an integrator having an adjustable unity frequency. The integrator includes a first input, first output and feedback loop between the first input and output of the integrator. The first input is connected to a branch that includes a first impedance, to which is applied a first input voltage of the low-pass filter. The feedback loop includes a second impedance and the first output of the integrator is the first output of the low-pass filter.

Low-pass filter with adjustable cut-off frequency

A process for color adjustment of a color monitor including a cathode-ray tube and a brightness adjustment module includes providing a nominal brightness signal downstream of a white level adjustment module for adjusting a white level and upstream of a black level adjustment module for adjusting a black level. The process also includes setting a voltage required to obtain a black color image, setting a voltage required to obtain a white color image, providing the nominal brightness signal upstream of the white level adjustment module, and setting the voltage required to obtain the black color image.

Process and device for color adjustment of a color monitor

A preamplifier including an input stage adapted to receiving an analog signal via a connection capacitor, and a differential output stage adapted to providing the signal referenced with respect to a predetermined level, and circuitry for enabling the input stage to accept a signal referenced to the differential stage ground, the signal provided by the output stage being referenced to this ground.

Video preamplifier

The present invention relates to a preamplifier including inputs for receiving input video signals representative of an image to be displayed on a screen, inputs for receiving logic signals representative of information to be displayed in superimposition on the screen, and outputs for supplying output video signals generated based on the input signals or the logic signals. An input receives a control signal to select which signals are used to generate the output video signals. In a first display mode, the signals used are the input signals, and in a second display mode, the signals used are the logic signals. Decoders and controllers allow monitoring of the state of the logic signals which select, in the second display mode, the input video signals to generate the output video signals.

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Theys, France

Jean-Pierre Blanc