Stmicroelectronics (rousset) Sas

Jean-Philippe Escales

Christian Rivero

Pascal Fornara

A stack including a dual-passivation is etched locally so as to reveal contact pads of an integrated circuit which are situated above a last metallization level of an interconnection part of the integrated circuit. This stack serves to protect the integrated circuit against a breakdown of at least one dielectric region, at least in part porous, separating two electrically conducting elements of the interconnection part of the integrated circuit. Such a breakdown may occur due to electrical conduction assisted by the presence of defects within the at least one dielectric region.

Stack of layers for protecting against a premature breakdown of interline porous dielectrics within an integrated circuit

A non-porous dielectric barrier is provided between a porous portion of a dielectric region and an electrically conductive element of an interconnect portion of an integrated circuit. This non-porous dielectric barrier protects the integrated circuit from breakdown of the least one dielectric region caused by electrical conduction assisted by the presence of defects located in the at least one dielectric region.

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Fuveau, France

Jean-Philippe Escales