Stmicroelectronics S.a.

Commissariat &#xc0; L'&#xc9;nergie Atomique Et Aux &#xc9;nergies Alternatives

Trixell

Jean-Luc Moro

Marc Sabut

Hugo Gicquel

Fabrice Blisson

Pierre Rohr

Nicolas Ricard

An electromagnetic radiation detector used for imaging comprises a plurality of pixels, each of which converts the electromagnetic radiation to which it is subjected into an electrical signal. Each pixel comprises a plurality of photosensitive elements each converting the radiation received by the photosensitive element into an elementary electrical signal and selection means that select from the elementary electrical signals generated by the photosensitive elements so as to form the electrical output signal of the pixel depending on a gain range chosen for the detector.

Electromagnetic radiation detector with gain range selection

In the field of imaging devices comprising a detector generating electric charges in response to incident photon radiation, and an analog-to-digital conversion circuit forming means for reading the quantity of electric charges generated, an analog-to-digital conversion circuit comprises: a comparator which can switch depending on the comparison between a potential on an integration node and a predetermined threshold potential, a counter incrementing with each switch of the comparator, a counter-charge injection circuit injecting a quantity Qc of counter-charges on the integration node with each switch of the comparator, and control means which determine the quantity Qc of counter-charges injected. The analog-to-digital conversion circuit is characterized in that the control means determine the quantity Qc of counter-charges injected as a function of a value of the counter.

Imaging device comprising a circuit for analog-digital conversion by means of the injection of a quantity of charges that varies as a function of the number of previous injections

A voltage regulator includes an amplifier and a regulation loop. The regulator includes a first PMOS transistor connected to a terminal supplying an input voltage, a second PMOS transistor connected in series with the first PMOS transistor. A node between those two transistors defines an output terminal. A first source of a first polarization current of fixed value is connected to the gate of the first transistor, and a second source of a second polarization current of fixed value connects the second transistor to ground. A third NMOS transistor is connected between the two current sources. A circuit is provided to modify automatically at least one of the polarization currents in relation to the load current.

Voltage regulator with self-adaptive loop

A circuit of generation of a reference voltage by a first MOS transistor connected to a first terminal of application of a supply voltage, the first transistor being in series with a second MOS transistor controlled by an input stage of a transconductance amplifier and their junction point defining an output terminal providing the reference voltage, a first current source connecting the first supply terminal to a gate of the first transistor, a second current source connecting the second transistor to a second terminal of application of the supply voltage, at least one third MOS transistor connecting the two current sources, and a capacitive element directly connecting the output terminal to a conduction terminal of the third transistor to vary the conduction of this third transistor in case of a variation in output voltage.

Circuits for generating a reference voltage

A device for shifting the level of a first signal of relatively low amplitude which is a function of a first supply voltage to a second signal of relatively high amplitude which is a function of a second supply voltage, comprising, between a first terminal of application of the second supply voltage and a first input terminal, a branch of two transistors of opposite types in series, having their junction point defining an output terminal, the respective control terminals of the transistors being connected to terminals of application of relatively high and low bias voltages by first resistive elements, a second input terminal, receiving the inverse of the signal applied on the first terminal, being connected to each of the control terminals of the transistors by first capacitive elements and the first input terminal being connected to each of the terminals of application of the bias voltages by second capacitive elements in series with second resistive elements.

Growing community of inventors

Le Sappey en Chartreuse, France

Jean-Luc Moro