International Business Machines Corporation

Other

Compagnie Ibm France

Jean Louis Calvignac

Fabrice Jean Verplanken

Claude Basso

Marco C Heddes

Chih-Jen Chang

Michael Steven Siegel

Brian Mitchell Bass

Natarajan Vaidhyanathan

Colin Beaton Verrilli

Gordon Taylor Davis

Joseph Franklin Logan

Philippe Damon

Piyush Chunilal Patel

Anthony Matteo Gallo

Clark Debs Jeffries

Ravi Kumar Arimilli

Francois Abel

James Johnson Allen, Jr

Ronald Edward Fuhs

Scott Michael Willenborg

Antonios Maragkos

Mark Anthony Rinaldi

Ross Boyd Leavens

Hubertus Franke

Lakshminarayana Baba Arimilli

Steven Richard Perrin

Edward Joseph Seminaro

Michael Raymond Trombley

Daniel Wind

Steven Kenneth Jenkins

Sridhar Rao

Santosh Prasad Gaur

Jean-Paul Aldebert

Brian Alan Youngman

Grayson Warren Randall

Miroslav Vrana

Renato John Recio

Harm Peter Hofstee

Mohammad Peyravian

William Todd Boyd

Douglas James Joseph

Daniel Orsatti

Kenneth James Barker

Jeffrey James Lynch

Sonia Kiang Rovner

Peter Irma August Barri

Peter I A Barri

Casimer M DeCusatis

Christoph Raisch

Kent Harold Haselhorst

Piyush Chaudhary

Rolf Clauberg

Tolga Ozguner

Brahmanand Kumar Gorti

Kerry Christopher Imming

Andreas Guenther Herkersdorf

David J Webb

Jan-Bernd Themann

Francis Arts

Pierre Leon Debuysscher

Robert A Sultan

Johan G A Verkinderen

Ivan Oscar Clemminck

Daniel Mark Dreps

Eren Kursun

Saravanan Sethuraman

Daniel Gene Eisenhauer

Richard Harold Boivie

Harvey Gene Kiel

Jan Van Lunteren

Kyle Alan Lucke

Satya Prakash Sharma

Hans-Werner Tast

Christoph Hermann Hagleitner

Juan Guillermo Revilla

Jens Leenstra

Glen Howard Handlogten

Gilles Toubol

Everett Arthur Corl, Jr

James Francis Mikos

David Alan Norgaard

Herman Dietrich Dierks

Robert Brian Likovich, Jr

Anil Pothireddy

Chad Everett Winemiller

Gerald Arnold Marin

William John Goetzinger

Samuel Steven Allison

Bart Joseph Gerard Pauwels

Vibhor K Srivastava

Douglas H Dykeman

Loren Douglas Larsen

Nathaniel Paul Sellin

Daniel James Sucher

Christopher Jon Johnson

Atef O Zaghloul

Terry L Nelms, Ii

Ashish A More

Natarajan Valdhyanathan

Mohammad Pevravian

A technique for operating a high performance computing cluster includes monitoring workloads of multiple processors. The high performance computing cluster includes multiple nodes that each include two or more of the multiple processors. Workload information for the multiple processors is periodically updated in respective local job tables maintained in each of the multiple nodes. Based on the workload information in the respective local job tables, one or more threads are periodically moved to a different one of the multiple processors.

Techniques for dynamically assigning jobs to processors in a cluster using local job tables

A technique for operating a high performance computing (HPC) cluster includes monitoring communication between threads assigned to multiple processors included in the HPC cluster. The HPC cluster includes multiple nodes that each include two or more of the multiple processors. One or more of the threads are moved to a different one of the multiple processors based on the communication between the threads.

Techniques for dynamically assigning jobs to processors in a cluster based on inter-thread communications

A network processor includes first communication protocol ports that each support 'M' minimum size packet data path traffic on 'N' lanes at &#x2018;S&#x2019; Gigabits per second (Gbps) and traffic with different communication protocol units on &#x2018;n&#x2019; additional lanes at &#x2018;s&#x2019; Gbps. The first communication protocol ports support access to an external coprocessor using parsing logic located in each of the first communication protocol ports. The parsing logic, during a parsing period, is configured to send a request to the external coprocessor at reception of a &#x2018;M&#x2019; size packet and to receive a response from the external coprocessor. The parsing logic sends a request maximum &#x2018;m&#x2019; size byte word to the external coprocessor on one of the additional lanes and receives a response maximum &#x2018;m&#x2019; size byte word from the external coprocessor on the one of the additional lanes while complying with the equation N&#xd7;S/M=&#x3c;n&#xd7;s/m.

Techniques for connecting an external network coprocessor to a network processor packet parser

A technique for analyzing network packets includes receiving, by a network processor, a network packet having a packet header including address and control information. A set of bytes are extracted, using the network processor, from the packet header and a set of input bits for generating a hash code are derived, using the network processor, from the set of bytes. Finally, the hash code is generated using the input bits.

Analysis of network packets using a generated hash code

A mechanism is provided for sharing a communication used by a parser (parser path) in a network adapter of a network processor for sending requests for a process to be executed by an external coprocessor. The parser path is shared by processors of the network processor (software path) to send requests to the external processor. The mechanism uses for the software path a request mailbox comprising a control address and a data field accessed by MMIO for sending two types of messages, one message type to read or write resources and one message type to trigger an external process in the coprocessor and a response mailbox for receiving response from the external coprocessor comprising a data field and a flag field. The other processors of the network poll the flag until set and get the coprocessor result in the data field.

Providing to a parser and processors in a network processor access to an external coprocessor

A network packet includes a packet key that includes one or more source-destination field pairs. Each source-destination field pair that is included in the one or more source-destination field pairs includes a source field and a destination field. For each selected source-destination field pair, included in the one or more source-destination field pairs, a first section and a second section are selected in the packet key. A source field value is extracted from the source field and a destination field value is extracted from the destination field of the selected source-destination field pair.

Transformation of bi-directional packet flow

A method and apparatus for processing of data packets by a data processing component comprising a plurality of processing resources. A metric value for a current configuration of the processing resources that are processing the data packets is identified. A new configuration of the processing resources is selected using the metric value. The current configuration of the processing resources is changed to the new configuration and data packets are distributed to the new configuration for processing as the data packets are received.

Network data packet processing

A mechanism is provided for merging in a network processor results from a parser and results from an external coprocessor providing processing support requested by said parser. The mechanism enqueues in a result queue both parser results needing to be merged with a coprocessor result and parser results which have no need to be merged with a coprocessor result. An additional queue is used to enqueue the addresses of the result queue where the parser results are stored. The result from the coprocessor is received in a simple response register. The coprocessor result is read by the result queue management logic from the response register and merged to the corresponding incomplete parser result read in the result queue at the address enqueued in the additional queue.

Merging result from a parser in a network processor with result from an external coprocessor

A method, a system, and a computer program product is disclosed for identifying a quality of service (QoS) classification of a packet in a network by a network processor. The method comprising: providing a table wherein a priority value with a maximum of N values is used as an index into the table to retrieve a QoS classification having a maximum of M values with M less than N; receiving a data packet in a stream of data packets; extracting at least two priority indicator values from the packet; converting the at least two priority indicator values into a priority value; utilizing the priority value as an index into the table; extracting the entry in the table corresponding to the priority value as the QoS classification of the packet; and utilizing the QoS classification for subsequent processing of the data packet.

Identification of QoS classification based on packet attributes

Mechanisms are provided for a network processor comprising a parser, the parser being operable to work in normal operation mode or in repeat operation mode, the parser in normal operation mode loading and executing at least one rule in a first and a second working cycle respectively, the parser in repeat operation mode being operable to repeatedly execute a repeat-instruction, the execution of each repeat corresponding to one working cycle.

Accelerating data packet parsing

An improved computer system that can include a controller having a computer processor, the controller to reduce insertion times and/or collisions when interfacing with new components introduced to the controller. The system may also include a collision avoidance apparatus that reduces hashing collisions by using a plurality of tables and a plurality of keys per bucket. The system may further include a hash apparatus in communication with the controller to map the plurality of keys to the plurality of tables where the hash apparatus uses a single hash logic to provide an avalanche effect when one key is changed which results in nearly half of bits changing in the plurality of tables.

Hash collision reduction system

An improved computer system may include a controller including a computer processor. The system may also include a selector apparatus in communication with the controller to choose a table having a higher collision quality index than other tables under consideration by the selector apparatus. The system may further include an exchanger apparatus to configure a standby table that replaces the table chosen by the selector apparatus. The system may additionally include a switch that changes a hash function based upon the exchanger apparatus' replacement of the chosen table to enable the controller to reduce insertion times and/or collisions when interfacing with new components introduced to the controller.

Computer interface system

Disclosed is a method for validating a data packet by a network processor supporting a first-network protocol and a second network protocol and utilizing shared hardware. The network processor receives a data packet; identifies a network packet protocol for the data packet; and processes the data packet according to the network packet protocol comprising: updating a first register with a first partial packet length specific to the first network protocol; updating a second register with a second partial packet length specific to the second network protocol; and updating a third register with a first checksum computed from fields independent of the network protocol. The method produces a second checksum utilizing a function that combines values from the first register, the second register, and the third register. The method validates the data packet by comparing the data packet checksum to the second checksum.

Checksum verification accelerator

Disclosed is a method and system for validating a data packet by a network processor supporting a first network protocol and a second network protocol and utilizing shared hardware. The network processor receives a data packet; identifies a network packet protocol for the data packet; and processes the data packet according to the network packet protocol comprising: updating a first register with a first partial packet length specific to the first network protocol; updating a second register with a second partial packet length specific to the second network protocol; and updating a third register with a first checksum computed from fields independent of the network protocol. The system produces a second checksum utilizing a function that combines values from the first register, the second register, and the third register. The system validates the data packet by comparing the data packet checksum to the second checksum.

Growing community of inventors

Cary, NC, United States of America

Jean Louis Calvignac