Qlogic Corporation

Promise Technology, Inc.

Istor Networks, Inc.

Emulex Corporation

Jean Kodama

Rexford Alan Hill

William Clinton Terrell

Harun Muliadi

Tracy Edmonds

Stephen How

Norman Chan

Michael Nishimura

Wayland Joeng

Eric Russell Peterson

Li Xu

Michael Morrison

Paul R Nitza

Borden T Moller

A storage networking device provides remote direct memory access to its buffer memory, configured to store storage networking data. The storage networking device may be particularly adapted to transmit and receive iSCSI data, such as iSCSI input/output operations. The storage networking device comprises a controller and a buffer memory. The controller manages the receipt of storage networking data and buffer locational data. The storage networking data advantageously includes at least one command for at least partially controlling a device attached to a storage network. Advantageously, the storage networking data may be transmitted using a protocol adapted for the transmission of storage networking data, such as, for example, the iSCSI protocol. The buffer memory advantageously is configured to at least temporarily store at least part of the storage networking data at a location within the buffer memory that is based at least in part on the locational data.

Remote direct memory access for iSCSI

Disclosed is a system and methods for accelerating network packet processing for devices configured to process network traffic at relatively high data rates. The system incorporates a hardware-accelerated packet processing module that handles in-sequence network packets and a software-based processing module that handles out-of-sequence and exception case network packets.

Network receive interface for high bandwidth hardware-accelerated packet processing

Mechanisms and processes for directly storing data into the memory of a storage device using the iSCSI protocol are described. One mechanism includes a transmitting device that encodes data to be stored in an iSCSI protocol data unit. Also encoded is buffer locational data that indicates, directly or indirectly, one or more memory addresses of where the data is to be stored within the buffer memory of a receiving device. The buffer locational data is encoded using standard fields within the iSCSI protocol data unit, such as the Target Transfer Tag. A receiving device decodes the buffer locational data and stores the received data at the memory locations specified by the buffer locational data.

Systems and methods of directly placing data in an iSCSI storage device

A router for use in a network includes a scalable architecture and performs methods for implementing quality of service on a logical unit behind a network port; and for implementing storage virtualization. The architecture includes a managing processor, a supervising processor; and a plurality of routing processors coupled to a fabric. The managing processor has an in-band link to a routing processor. A routing processor receives a frame from the network, determines by parsing the frame, the protocol and logical unit number, and routes the frame to a queue according to a traffic class associated with the logical unit number in routing information prepared for the processors. An arbitration scheme empties the queue in accordance with a deficit round robin technique. If a routing processor detects the frame's destination is a virtual entity, and so is part of a virtual transaction, the router conducts a nonvirtual transaction in concert with the virtual transaction. The nonvirtual transaction accomplishes the intent of the virtual transaction but operates on an actual network port, for example, a storage device.

Router with routing processors and methods for virtualization

Router and methods for distributed virtualization

Router and methods using network addresses for virtualization

Bus interfacing circuitry provides for high speed communication of signals on a bus by using circuitry that synchronizes data transfers to a single reference point, executes commands from a dual-ranked buffer in order to reduce time consumed by external interrupts, and stores multiple bytes in a FIFO buffer to allow rapid sequential transfers; while also providing a flexible input/output configuration allowing both single-ended and differential mode connections.

Bus interface synchronization circuitry for reducing time between

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Cerritos, CA, United States of America

Jean Kodama