Stmicroelectronics (Rousset) Sas

Stmicroelectronics (Crolles 2) Sas

Jean Jacques Fagot

Philippe Boivin

Olivier Weber

Emmanuel Petitprez

Emeline Souchier

The disclosure relates to integrated circuits and methods including one or more rows of transistors. In an embodiment, an integrated circuit includes a row of bipolar transistors including a plurality of first conduction regions, a second conduction region, and a common base between the first conduction regions and the second conduction region. An insulating trench is in contact with each bipolar transistor of the row of bipolar transistors. A conductive layer is on the insulating trench and the common base between the first conduction regions. A spacer layer is between the conductive layer and the first conduction regions.

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Rousset, France

Jean Jacques Fagot