Samsung Display Co., Ltd.

Samsung Electronics Co., Ltd.

Jean-Ho Song

Jae-Hyoung Youn

Jong-in Kim

Byeong-Beom Kim

Je-Hyeong Park

Young-Wook Lee

Ki-Yeup Lee

Woo-Geun Lee

Shi-Yul Kim

Sung-Ryul Kim

O-Sung Seo

Chang-Oh Jeong

Yu-Gwang Jeong

Ki-Won Kim

Shin-Il Choi

Dong-Ju Yang

Hong-Suk Yoo

Bong-Kyun Kim

Jong-Hyun Choung

Sun-Young Hong

Yang-Ho Bae

Nam-Seok Suh

Dong-Gyu Kim

Joon-Hoo Choi

Jong-In Kim

Hwa-Yeul Oh

Jae-Jin Song

Woo-Sung Sohn

Pil-Soon Hong

Chong-Chul Chai

Sang-Soo Kim

Hoon Jong Kang

Ji-Eun Lee

Hong-Sick Park

Min Hyuck Kang

Jin-Ho Ju

Sang-Woo Kim

Yang-Ho Jung

Yeong-Keun Kwon

Hyun-Wuk Kim

Hyun-Jin Kim

Jae-Sung Kim

Joo-Ae Youn

Sang-Ki Kwak

Seong-Hun Kim

Sung-Jin Hong

Myung-Koo Kang

In-Su Joo

Min-cheol Lee

Hyang-Yul Kim

Sook-Young Kang

Tae-Woo Kim

Beom-Rak Choi

Seung-Hyun Park

Jun-Hyung Souk

Wang-Woo Lee

Sam-Young Cho

Eun-Je Jang

Sung-In Ro

Ock-Soo Son

Won-Guk Seo

Hyun-cheol Shin

Jung-Ho Park

Byoung-Yong Kim

Woong-Ki Jeon

Jae-Hyoung Yoon

Do-Won Kim

Ki-Beom Lee

A thin film transistor substrate includes a switching element comprising a gate electrode electrically connected to a gate line extending in a first direction, an active pattern overlapping with the gate electrode, a source electrode disposed on the active pattern and electrically connected to a data line extending in a second direction crossing the first direction, and a drain electrode spaced apart from the source electrode. The thin film transistor substrate further includes an organic layer disposed on the switching element, a first electrode disposed on the organic layer, and a second electrode overlapping with the first electrode, and electrically connected to the drain electrode. A thickness of the second electrode is thicker than a thickness of the first electrode.

Thin film transistor substrate and method of manufacturing the same

A method for forming a thin film according to an exemplary embodiment of the present invention includes forming the thin film at a power density in the range of approximately 1.5 to approximately 3 W/cmand at a pressure of an inert gas that is in the range of approximately 0.2 to approximately 0.3 Pa. This process results in an amorphous metal thin film barrier layer that prevents undesired diffusion from adjacent layers, even when this barrier layer is thinner than many conventional barrier layers.

Manufacturing method of thin film and metal line for display using the same, thin film transistor array panel, and method for manufacturing the same

A liquid crystal display panel includes a base substrate, a first step difference compensating pattern, a gate metal pattern, a semiconductor pattern, a source electrode, a drain electrode, a pixel electrode and a color filter. The first step difference compensating pattern is disposed on the base substrate and includes an inorganic material. The gate metal pattern is disposed on the first step difference compensating pattern and includes a gate electrode and a gate line electrically connected to the gate electrode. The semiconductor pattern is overlapped with the gate electrode. The source electrode is electrically connected to the semiconductor pattern. The drain electrode is electrically connected to the semiconductor pattern and is spaced apart from the source electrode. The pixel electrode is electrically connected to the drain electrode. The color filter is overlapped with the pixel electrode.

Liquid crystal display panel and method for manufacturing the same

A liquid crystal display device includes an insulation substrate including a transmissive area and a reflective area, an organic layer positioned on the insulation substrate, and including a triangular pattern in the reflective area, a reflective electrode including reflective patterns corresponding to the triangular pattern of the organic layer in the reflective area, a color filter layer positioned on the reflective electrode, and including an opening for exposing a partial area of the reflective pattern, and a transparent layer disposed inside the opening of the color filter layer.

Liquid crystal display device and method of fabricating the same

A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape.

Thin film transistor substrate and the method thereof

A thin film transistor array panel is provided and includes a gate line, a gate insulating layer covering the gate line, a semiconductor layer disposed on the gate insulating layer, and a data line and a drain electrode disposed on the semiconductor layer. The data line and the drain electrode have a dual-layered structure including a lower layer and an upper layer with the lower layer having a first portion protruded outside the upper layer and the semiconductor layer having a second portion protruded outside the edge of the lower layer.

Thin film transistor array panel and method for manufacturing the same

A thin-film transistor (TFT) and a method of manufacturing the same are disclosed herein. The TFT may include a gate electrode disposed on an insulating substrate, an insulating layer disposed on the insulating substrate and the gate electrode, an active layer pattern disposed on the insulating layer to overlap the gate electrode, a source electrode disposed on the insulating layer and at least part of which overlaps the active layer pattern, and a drain electrode which is separated from the source electrode and at least part of which overlaps the active layer pattern. A first ohmic contact layer pattern may be disposed between the active layer pattern and the source electrode and between the active layer pattern and the drain electrode. The first ohmic contact layer may have higher nitrogen content on its surface than in other portions of the first ohmic contact layer.

Thin-film transistor and method of manufacturing the same

A thin film transistor array panel according to an exemplary embodiment of the present invention comprises a substrate, a gate line formed on the substrate, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, and a data line formed on the semiconductor layer, wherein the data line comprises a lower data layer, an upper data layer, a data oxide layer, and a buffer layer, wherein the upper data layer and the buffer layer comprise a same material.

Thin film transistor substrate and manufacturing method thereof

A thin-film transistor (TFT) substrate having reduced defects is fabricated using a reduced number of masks. The TFT substrate includes gate wiring formed on a substrate. The gate wiring includes a gate electrode. A semiconductor pattern is formed on the gate wiring. An etch-stop pattern is formed on the semiconductor pattern. Data wiring includes a source electrode which is formed on the semiconductor pattern and the etch-stop pattern. Each of the gate wiring and the data wiring includes a copper-containing layer and a buffer layer formed on or under the copper-containing layer.

Thin-film transistor substrate and method of fabricating the same

A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.

A method for manufacturing a thin film transistor array panel includes forming a gate line; forming an insulating layer on the gate line; forming first and second silicon layers first and second metal layers; forming a photoresist pattern having first and second portions; forming first and second metal patterns by etching the first and second metal layers; processing the first metal pattern with SFor SF/He; forming silicon and semiconductor patterns by etching the second and first silicon layers; removing the first portion of the photoresist pattern; forming an upper layer of a data wire by wet etching the second metal pattern; forming a lower layer of the data wire and an ohmic contact by etching the first metal and amorphous silicon patterns; forming a passivation layer including a contact hole on the upper layer; and forming a pixel electrode on the passivation layer.

Method for manufacturing thin film transistor array panel

A thin film transistor array panel includes: a substrate; a signal line disposed on the substrate and including copper (Cu); a passivation layer disposed on the signal line and having a contact hole exposing a portion of the signal line; and a conductive layer disposed on the passivation layer and connected to the portion of the signal line through the contact hole, wherein the passivation layer includes an organic passivation layer including an organic insulator that does not include sulfur, and a method of manufacturing the thin film transistor prevents formation of foreign particles on the signal line.

Growing community of inventors

Yongin-si, South Korea

Jean-Ho Song