International Business Machines Corporation

Jean-Claude Zunino

Daniel Orsatti

Claude Basso

Fabrice Jean Verplanken

Jean L Calvignac

Dominique Rigal

Ange Aznar

Bruno Rousseau

Jean-Paul Aldebert

Mathieu Michel Girard

Paul Chemla

Jeane-Paul Aldebert

In an ATM cell-relay network usually comprising several switching nodes a method enabling remote surveillance of any entry port to any switching node of the network. The method first assumes that a path is set up from the entry port to a remote observation point. Then, all cells of the incoming traffic, entering entry port to be watched, are duplicated and marked. After which they are transported, unaltered, following the path, up to the observation point. The invention permits that any entry port of an ATM network, that may well span over large geographic areas, be conveniently observable and analyzed transparently i.e., without disturbing users traffic, from a remote location so as network can be maintained and run trouble free.

System and method for enabling remote surveillance of ATM network switching node ports

A method and system for injecting/extracting a control cell into/from a data connection transmitted from a source switching node to a destination switching node of an Asynchronous Transfer Mode (ATM) network. The injecting method consists in adding to the ATM cell a switch routing label (SRL) and a protocol engine correlator (PEC) by the control point of the injection switching node before injecting the cell into the connection. The extracting method consists in setting a control flag in the control block of the incoming cell if this cell includes an extraction condition indicating that it is a control cell to be extracted, and adding to the control cell a switch routing label corresponding to the control point (CP SRL) and a reserved static protocol engine correlator (SPEC).

Method of injecting/extracting control cells in an asynchronous transfer mode (ATM) network

A system and method for freezing a processing unit to facilitate on-line debugging of a protocol engine within a switching node of a data transmission network. In accordance with the system of the present invention, the protocol engine includes a plurality of processing units such as an identification unit, a lookup unit, a traffic management and congestion unit, an enqueue unit, a dequeue unit, a traffic management scheduling unit, a frame transmission unit, a control unit, and a control block unit. The control block unit includes a freeze register containing multiple freeze bits, wherein each freeze bit is associated with one processing unit. In response to setting a freeze bit, resources and settings of a processing unit associated with the set freeze bit are prevented from being changed by the processing unit.

On-line debugging system in a switching node of a data transmission network

The invention discloses a method and an apparatus for implementing the physical interface in a network element connected to a packet network such as Asynchronous Transfer Mode (ATM) network. With the solution of the invention, the physical interface functions can be integrated on one chip for more than one network port. The physical interface is provided between port bit streams at media speed and word data flow transferred onto/from a bus which is under the control of the network equipment. The solution of the invention includes grouping logics and storage elements by islands of more than one port. Furthermore, the logics and storage elements for statistical counting operations can be grouped for a processing generalized to all ports. Finally, the solution of the present invention takes into account two characteristics of the physical interface which are the different rates between network link media speed and bus access rate and the technology of the high density static imbedded RAMs used for hardware integration. The Flip/Flop pointer RAMs of Flip/Flop data RAMs are duplicated and some interface RAMs are created to transfer control data between the islands and the generalized processing logical blocks.

Method and apparatus providing a multiport physical interface to high

The invention discloses a method and an apparatus for in-line and on-site updating of Field Programmable Gate Arrays with remote loaded configuration data files. Flash EEPROMs which are used because of their non-volatile memories and their high density, are storing more than one configuration data file. The memories are divided in more than one part, each part of the memory for storing one configuration data file. One part of the memory also contains a flag identifying the currently loaded configuration data file. The Flash EPROM's bits being set to one same binary value before any writing operation, including the update of the configuration data file containing the flag. The setting of the bits to said binary value always identifies a valid other configuration data file in order to insure a correct re-loading of the FPGAs in case of reception of an unexpected event leading to an initialization.

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Nice, France

Jean-Claude Zunino