Stmicroelectronics S.a.

Sgs-microelectronics S.a.

Jean-Claude Le Bihan

Roland Marbot

Pascal Couteaux

Reza Nezamzadeh

Francis Mottini

Michel D'Hoe

Anne Pierre-Duplessix

Anne Pierre Duplessix

Disclosed is a device for the conversion of a series signal received in the form of a low-amplitude, high-frequency differential signal into n parallel signals. The device uses a scheme derived from that of a static memory cell as a sample-and-hold unit and amplifier. The device continues to perform well when the differential signal comprises noise in common mode.

System for series to parallel conversion of a low-amplitude and high frequency signal

An integrated circuit comprises at least one differential input stage. The differential input stage includes an input circuit and a shaping circuit. The input circuit comprises a first portion and a second portion for providing two pairs of differential signals. The propagation times of the first and second circuit portions are preferably substantially identical. The shaping circuit differentiates each of the two pairs of differential signals and combines them to obtain a single binary type of signal.

Differential input stage for wideband reception with high rejection of

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Grenoble, France

Jean-Claude Le Bihan