Cirrus Logic Inc.

Sigmatel, Inc.

Jean Charles Pina

Marc Kevin Jordan

Rahul Singh

Antonio Torrini

Edwin De Angel

John L Melanson

Eric Jerome King

Michael Allan Kost

Robert Thomas Grisamore

Russell Alvin Schultz

Yanhui Xie

Jorge Antonio Abullarade

Thomas A Zudock

Dale Brummel

Richard Dean Putman

Steve Tuyen Vu

Spencer Isaacson

Jeffrey Patrick Gleason

Hang Liu

Robert Leon Gorsegner

A power train may have a power train input and a power train output, wherein the power train is configured to transfer electrical energy from the power train input to a load coupled to the power train output in conformity with one or more power train control signals. A scheduler may be configured to receive events from the power train and, responsive to each particular event, schedule execution of a thread of control instructions responsive to the particular event, wherein the thread is selected from a plurality of threads. A processor may be configured to execute the threads of control instructions scheduled by the scheduler, such that for each particular event the processor generates one or more power train control signals responsive to the particular event within a first switching cycle of receipt of the particular event or within a second switching cycle immediately subsequent to the first switching cycle.

Programmable system architecture for power controllers including thread execution responsive to power train event

A flexible memory interface system includes a control module, instruction memory, a command processing unit, an address processing unit, and a data processing unit. The control module controls storing and retrieving of a command portion, an addressing portion, and data of an instruction to access memory to and from the instruction memory and the command processing unit, the address processing unit, and the data processing unit, respectively. The command processing unit is operably coupled to process a command portion of an instruction to access memory. The address processing unit is operably coupled to process an addressing portion of the instruction to access the memory. The data processing unit is operably coupled to process data conveyance to or from the external memory based on the instruction to access the memory.

Flexible memory interface system for independently processing different portions of an instruction

According to systems and methods of this disclosure, a controller may be configured to: operate in a first compatibility mode of operation, determine from an input signal of the lamp assembly during operation in the first compatibility mode whether the first compatibility mode of operation provides compatibility between the lamp assembly and a power infrastructure to which it is coupled, select the first compatibility mode of operation from a plurality of modes of operation as a compatibility mode responsive to determining that the first compatibility mode of operation provides compatibility between the lamp assembly and a power infrastructure to which it is coupled, and select a second compatibility mode of operation from the plurality of modes of operation as the compatibility mode responsive to determining that the first compatibility mode of operation does not provide compatibility between the lamp assembly and the power infrastructure to which it is coupled.

Systems and methods for selecting a compatibility mode of operation for a lamp assembly

A power measurement and calibration system provides power and line frequency measurements by using a bandpass filter having complex voltage and current outputs from which real and imaginary power components can be determined. Calibration of the filter may be omitted if a complex wavelet filter is used to implement the bandpass filter and a determination of line frequency can also be provided for downstream use. A processor receiving data from the output of the filter can compute real and imaginary power, power factor and the line frequency. The filter may be implemented by a processor executing program instructions, or a digital circuit implementing the filter and optionally a CORDIC rotator for computing the current-to-voltage phase relationship can provide input to the processor for power measurement and calibration of the sample rate to line frequency relationship and for other uses.

Complex wavelet filter based power measurement and calibration system

A method and apparatus for automatically securing non-volatile (NV) storage in an integrated circuit provides improved resistance to code copying and reverse-engineering attacks. External interfaces that provide read access to the NV storage are be disabled, for a predetermined time after a reset or other initialization signal is received. An internal lock state bit or key is checked as well as an external lock prevent indication. If the lock prevent indication is not received, or the internal lock state bit is already set, then the integrated circuit is operated under a locked condition, in which external access to the NV storage values is prevented. The lock prevent indication may be a signal provided during reset of the integrated circuit on a terminal that is used for another purpose after initialization of the integrated circuit.

Method and apparatus for automatically securing non-volatile (NV) storage in an integrated circuit

A memory device has a plurality of memory blocks utilized to store data. One of the blocks is used as a hidden memory block to store an operating system program, instead of data. The hidden memory block is designated as a bad block so that data will not be written into the hidden memory block, but a tag associated with the hidden memory block identifies that the hidden memory block contains the operating system program.

Use of NAND flash for hidden memory blocks to store an operating system program

An internal memory uses a resource identifier to identify which functional program from an external memory is to be loaded into an overlay space of the internal memory. In executing a program statement of a main program to perform a particular functional operation without identifying a corresponding functional program, a prelude stored in a prelude space of the internal memory provides a resource identifier for the functional operation. The resource identifier identifies a corresponding functional program to perform the particular functional operation and the identified functional program is then loaded into the overlay space to be executed.

Use of a resource identifier to import a program from external memory for an overlay

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Austin, TX, United States of America

Jean Charles Pina