Maxim Integrated Products, Inc.

Nxp B.v.

Qualcomm Incorporated

Nxp Usa, Inc.

Qualcomm Technologies, Inc.

Jean CauXuan Le

Patrick Yin Chan

Ashutosh Ravindra Joharapurkar

Natarajan Viswanathan

Ronak Prakashchandra Trivedi

See-Hoi Caesar Wong

Guozhong Shen

Ozan Ersan Erdogan

Syed Mahmud

David Castaneda

Carmelo Morello

Yuanfang Li

Ranga Seshu Paladugu

Hanqing Xing

Hanging Xing

A method for self-calibration of reference voltage drop in a Digital to Analog Converter (DAC) includes measuring each one of a plurality of thermometric weightages associated with a respective one of a plurality of thermometric bits, wherein the DAC includes a plurality of sub-binary bits and the plurality of thermometric bits. For each sequentially increasing combination of thermometric bit settings including at least two thermometric bits coupled to a high reference voltage and each sub-binary bit coupled to a low reference voltage, performing the steps of: determining a respective combined weightage correction; adding the combined weightage correction to the highest order bit of the combination of thermometric bit settings; and incrementing a number of bits of the combination of thermometric bit settings in response to the number of bits of the sequential combination being less than a total number of the plurality of thermometric bits.

Self-calibration of reference voltage drop in digital to analog converter

One example discloses a reconfigurable analog to digital converter (ADC) device, including: an analog front end (AFE) configured to receive a set of analog input signals and generate a corresponding set of digital output signals; wherein the AFE includes a set of reconfigurable ADC conversion circuits; and a sequencer coupled to the AFE and configured to control the set of reconfigurable ADC conversion circuits with a first AFE channel configuration at a first time and a second AFE channel configuration at a second time.

Reconfigurable analog to digital converter (ADC)

A self-calibrating digital-to-analog converter (DAC) is disclosed. The self-calibrating DAC includes an input port, a non-binary DAC, an ADC to receive an output of the non-binary DAC, a lookup table to store a plurality of calibration code and a calibration logic coupled with the non-binary DAC. The self-calibrating DAC has two modes of operations, a calibration mode and a normal operational mode. In the calibration mode, the self-calibrating DAC is configured to calculate weightages of the non-binary DAC and to calculate an offset coefficient and a gain coefficients using high precision on chip analog-to-digital converter (ADC).

Self calibrating digital-to-analog converter

A differential sensing scheme provides a means for detecting one or more touch events on a touch sensitive device in the presence of incident noise. Instead of sensing one touch sensitive channel, such as a row, column, or single touch sensor, multiple touch sensitive channels are sampled at a time. By sampling two nearby channels simultaneously and doing the measurement differentially, noise common to both channels is cancelled. The differential sensing scheme is implemented using simple switch-capacitor AFE circuitry. The originally sensed data on each individual channel is recovered free of common-mode noise. The recovered sensed data is used to determine the presence of one or more touch events and if present the location of each touch event on the touch sensitive device.

Noise cancellation technique for capacitive touchscreen controller using differential sensing

A system includes a sub-binary radix digital-to-analog converter (DAC) that converts a digital input signal to an analog output signal based on a sub-radix DAC code. A radix conversion module performs radix conversion on the digital input signal. To perform the radix conversion, the radix conversion module associates bit positions corresponding to the digital input signal with respective analog weights and converts the digital input signal to the sub-radix DAC code based on the respective analog weights.

Precision sub-RADIX2 DAC with analog weight based calibration

Capacitance sensing circuits, systems and method can include sample and hold (S/H) circuits that can retain analog values for one set of capacitance sensors, and sequentially convert such analog values into digital values while analog values for another set of capacitance sensors values are generated.

Circuits, devices and methods having pipelined capacitance sensing

Growing community of inventors

Santa Clara, CA, United States of America

Jean CauXuan Le