Brain Corporation

Qualcomm Technologies, Inc.

Qualcomm Incorporated

Jayram Moorkanikara Nageswaran

Eugene Izhikevich

Filip Lukasz Piekniewski

Botond Szatmary

Csaba Petre

Micah Richert

Dimitry Fisher

John Black

Cody Griffin

Jeffrey Alexander Levin

Venkat Rangan

Erik Christopher Malone

Sach Hansen Sokol

Oleg Sinyavskiy

Borja Ibarz Gabardos

Michah Richert

Systems and methods for robotic mapping are disclosed. In some example implementations, an automated device can travel in an environment. From travelling in the environment, the automated device can create a graph comprising a plurality of nodes, wherein each node corresponds to a scan taken by one or more sensors of the automated device at a location in the environment. In some example embodiments, the automated device can reevaluate its travel along a desired path if it encounters objects or obstructions along its path, whether those objects or obstructions are present in the front, rare or side of the automated device. In some example embodiments, the automated device uses a timestamp methodology to maneuver around its environment that provides faster processing and less usage of memory space.

Systems and methods for robust robotic mapping

Systems and methods for automatic detection of spills are disclosed. In some exemplary implementations, a robot can have a spill detector comprising at least one optical imaging device configured to capture at least one image of a scene containing a spill while the robot moves between locations. The robot can process the at least one image by segmentation. Once the spill has been identified, the robot can then generate an alert indicative at least in part of a recognition of the spill.

Systems and methods for automatic detection of spills

Apparatus and methods for high-level neuromorphic network description (HLND) framework that may be configured to enable users to define neuromorphic network architectures using a unified and unambiguous representation that is both human-readable and machine-interpretable. The framework may be used to define nodes types, node-to-node connection types, instantiate node instances for different node types, and to generate instances of connection types between these nodes. To facilitate framework usage, the HLND format may provide the flexibility required by computational neuroscientists and, at the same time, provides a user-friendly interface for users with limited experience in modeling neurons. The HLND kernel may comprise an interface to Elementary Network Description (END) that is optimized for efficient representation of neuronal systems in hardware-independent manner and enables seamless translation of HLND model description into hardware instructions for execution by various processing modules.

High level neuromorphic network description apparatus and methods

Apparatus and methods for salient feature detection by a spiking neuron network. The network may comprise feature-specific units capable of responding to different objects (red and green color). The plasticity mechanism of the network may be configured based on difference between two similarity measures related to activity of different unit types obtained during network training. One similarity measure may be based on activity of units of the same type (red). Another similarity measure may be based on activity of units of one type (red) and another type (green). Similarity measures may comprise a cross-correlogram and/or mutual information determined over an activity window. During network operation, the activity based plasticity mechanism may be used to potentiate connections between units of the same type (red-red). The plasticity mechanism may be used to depress connections between units of different types (red-green). The plasticity mechanism may effectuate detection of salient features in the input.

Spiking neuron sensory processing apparatus and methods for saliency detection

Apparatus and methods for partial evaluation of synaptic updates in neural networks. In one embodiment, a pre-synaptic unit is connected to a several post synaptic units via communication channels. Information related to a plurality of post-synaptic pulses generated by the post-synaptic units is stored by the network in response to a system event. Synaptic channel updates are performed by the network using the time intervals between a pre-synaptic pulse, which is being generated prior to the system event, and at least a portion of the plurality of the post synaptic pulses. The system event enables removal of the information related to the portion of the post-synaptic pulses from the storage device. A shared memory block within the storage device is used to store data related to post-synaptic pulses generated by different post-synaptic nodes. This configuration enables memory use optimization of post-synaptic units with different firing rates.

Apparatus and method for partial evaluation of synaptic updates based on system events

Apparatus and methods for efficient synaptic update in a network such as a spiking neural network. In one embodiment, the post-synaptic updates, in response to generation of a post-synaptic pulse by a post-synaptic unit, are delayed until a subsequent pre-synaptic pulse is received by the unit. Pre-synaptic updates are performed first following by the post-synaptic update, thus ensuring synaptic connection status is up-to-date. The delay update mechanism is used in conjunction with system 'flush' events in order to ensure accurate network operation, and prevent loss of information under a variety of pre-synaptic and post-synaptic unit firing rates. A large network partition mechanism is used in one variant with network processing apparatus in order to enable processing of network signals in a limited functionality embedded hardware environment.

Apparatus and methods for synaptic update in a pulse-coded network

Object recognition apparatus and methods useful for extracting information from an input signal. In one embodiment, the input signal is representative of an element of an image, and the extracted information is encoded into patterns of pulses. The patterns of pulses are directed via transmission channels to a plurality of detector nodes configured to generate an output pulse upon detecting an object of interest. Upon detecting a particular object, a given detector node elevates its sensitivity to that particular object when processing subsequent inputs. In one implementation, one or more of the detector nodes are also configured to prevent adjacent detector nodes from generating detection signals in response to the same object representation. The object recognition apparatus modulates properties of the transmission channels by promoting contributions from channels carrying information used in object recognition.

Apparatus and methods for temporally proximate object recognition

Round-trip engineering apparatus and methods for neural networks

A simple format is disclosed and referred to as Elementary Network Description (END). The format can fully describe a large-scale neuronal model and embodiments of software or hardware engines to simulate such a model efficiently. The architecture of such neuromorphic engines is optimal for high-performance parallel processing of spiking networks with spike-timing dependent plasticity. Neuronal network and methods for operating neuronal networks comprise a plurality of units, where each unit has a memory and a plurality of doublets, each doublet being connected to a pair of the plurality of units. Execution of unit update rules for the plurality of units is order-independent and execution of doublet event rules for the plurality of doublets is order-independent.

Elementary network description for neuromorphic systems with plurality of doublets wherein doublet events rules are executed in parallel

A simple format is disclosed and referred to as Elementary Network Description (END). The format can fully describe a large-scale neuronal model and embodiments of software or hardware engines to simulate such a model efficiently. The architecture of such neuromorphic engines is optimal for high-performance parallel processing of spiking networks with spike-timing dependent plasticity. The software and hardware engines are optimized to take into account short-term and long-term synaptic plasticity in the form of LTD, LTP, and STDP.

Apparatus and methods for event-triggered updates in parallel networks

Systems and methods for providing a neural network having an elementary network description for efficient implementation of event-triggered plasticity rules

Growing community of inventors

San Diego, CA, United States of America

Jayram Moorkanikara Nageswaran