Other

Terepac Corporation

Nanosolar, Inc.

Jayna Sheats

Yun Uhm

Douglas Knox

Phil Stob

Ric Asselstine

Parallel transfers of components from donor plates to chip modules can be performed with a single alignment step, after arranging the components to have the correct lateral positions. For example, a dimension of the chip module can be separated to be an integer multiple of a period of the component array on the donor plates.

Chip separation process for photochemical component printing

The present invention discloses methods and apparatuses for the separations of IC fabrication and assembling of separated IC components to form complete IC structures. In an embodiment, the present fabrication separation of an IC structure into multiple discrete components can take advantages of dedicated IC fabrication facilities and achieve more cost effective products. In another embodiment, the present chip assembling provides high density interconnect wires between bond pads, enabling cost-effective assembling of small chip components. In an aspect, the present process provides multiple interconnect wires in the form of a ribbon between the bond pads, and then subsequently separates the ribbon into multiple individual interconnect wires.

Processes and structures for IC fabrication

The present invention discloses methods and apparatuses for the separations of IC fabrication and assembling of separated IC components to form complete IC structures. In an embodiment, the present fabrication separation of an IC structure into multiple discrete components can take advantages of dedicated IC fabrication facilities and achieve more cost effective products. The present process can fabricate multiple components separately before assembling them into a complete integrated circuit. In an aspect, the ready-for-assembling components are taken directly from processed wafers without any additional assembling processes, and/or having lateral dimensions less than 1 mm.

Methods to fabricate integrated circuits by assembling components

The present invention discloses methods and apparatuses for the separations of IC fabrication and assembling of separated IC components to form complete IC structures. In an embodiment, the present fabrication separation of an IC structure into multiple discrete components can take advantages of dedicated IC fabrication facilities and achieve more cost effective products. In another embodiment, the present chip assembling provides high density interconnect wires between bond pads, enabling cost-effective assembling of small chip components. In an aspect, the present process bonds multiple interconnect wires to bond pads with electrical linkages between the bond pads and then subsequently separates the adjacent bond pads.

Methods for interconnecting bonding pads between components

The present invention relates to methods and apparatuses for assembling substrates with functional blocks, using a printhead to deliver individual functional blocks to the appropriate locations on the substrates. In an embodiment, the functional block releasing mechanism comprises a heat source to provide thermal energy and a light source to provide photon energy, wherein the heat source and the light source enable releasing individual functional blocks from the reservoir for positioning on the substrate. The heat source can comprise an array of heating elements, such as thin film heating elements, which can provide localized heating to individual elements, thus enabling releasing individual functional blocks. The light source can comprise a laser beam and a moving mechanism to move the laser beam to the individual functional blocks.

Methods and apparatuses for assembling components onto substrates

The present invention discloses methods and apparatuses for the separations of IC fabrication and assembling of separated IC components to form complete IC structures. In an embodiment, the present fabrication separation of an IC structure into multiple discrete components can take advantages of dedicated IC fabrication facilities and achieve more cost effective products. In another embodiment, the present chip assembling provides high density interconnect wires between bond pads, enabling cost-effective assembling of small chip components. In an aspect, the present process provides a beveled slope of the components to facilitate interconnection bonding.

Processes and structures for beveled slope integrated circuits for interconnect fabrication

The present invention discloses systems and methods for printing functional blocks from a plurality of printheads to a target substrate. In exemplary embodiments, the printing system comprises a main printhead for the majority of printing process, and a secondary printhead for supplemental printing. The system further comprises a controller, utilizing a positioning intelligence system to distribute the printing of the functional blocks between the main printhead and the secondary printhead, to minimize the motions of the printheads while maximize the printing speed.

Systems and methods for printing electronic device assembly

Methods and devices for solar cell interconnection are provided. In one embodiment, the method includes physically alloying the ink metal to the underlying foil (hence excellent adhesion and conductivity with no pre-treatment), and by fusing the solid particles in the ink on the surface (eliminating any organic components) so that the surface is ideally suited for good conductivity and adhesion to an overlayer of finger ink, which is expected to be another adhesive. In some embodiments, contact resistance of conductive adhesives are known to be much lower on gold or silver than on any other metals.

Solar cell interconnection

The present invention discloses methods and apparatuses for the separations of IC fabrication and assembling of separated IC components to form complete IC structures. In an embodiment, the present fabrication separation of an IC structure into multiple discrete components can take advantages of dedicated IC fabrication facilities and achieve more cost effective products. In another embodiment, the present chip assembling provides high density interconnect wires between bond pads, enabling cost-effective assembling of small chip components. In an aspect, the present process coats the component surfaces to facilitate the bonding of the bond pads. In another aspect, the present process coats the bond pads with shelled capsules to facilitate the bonding of the bond pads.

The present invention discloses methods and apparatuses for the separations of IC fabrication and assembling of separated IC components to form complete IC structures. In an embodiment, the present fabrication separation of an IC structure into multiple discrete components can take advantages of dedicated IC fabrication facilities and achieve more cost effective products. The process can separate the integrated circuits into an analog portion and a digital portion with the analog portion comprising passive components utilizing dielectric materials different than silicon dioxide and active components utilizing channel materials different than substrate single crystal silicon.

The present invention discloses methods and apparatuses for the separations of IC fabrication and assembling of separated IC components to form complete IC structures. In an embodiment, the present fabrication separation of an IC structure into multiple discrete components can take advantages of dedicated IC fabrication facilities and achieve more cost effective products. In another embodiment, the present chip assembling provides high density interconnect wires between bond pads, enabling cost-effective assembling of small chip components. In an aspect, the present process forms interconnect wires on a thermal decomposable adhesive, and after positioning the wires at proper bond pad locations, releases the interconnect wires onto the bond pads.

The present invention discloses methods and apparatuses for the separations of IC fabrication and assembling of separated IC components to form complete IC structures. In an embodiment, the present fabrication separation of an IC structure into multiple discrete components can take advantages of dedicated IC fabrication facilities and achieve more cost effective products. In another embodiment, the present chip assembling provides high density interconnect wires between bond pads, enabling cost-effective assembling of small chip components. In an aspect, the present process extrudes interconnect wires over a desired location of the bond pads, and then subsequently laser cuts a correct length of the interconnect wires.

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Palo Alto, CA, United States of America

Jayna Sheats